Renato S. Feitoza
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2018–2020
Best venue rank
B
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | ETS | On-chip reduced-code static linearity test of V | Renato S. Feitoza, Manuel J. Barragn, Antonio J. Gins, Salvador Mir |
| 2018 | IOLTS | Reduced-code static linearity test of SAR ADCs using a built-in incremental ∑Δ converter. | Renato S. Feitoza, Manuel J. Barragn, Salvador Mir, Daniel Dzahini |