Renqiu Huang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2003–2005
Best venue rank
B
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | FPL | PAHLS: Towards Run-Time Synthesis for FPGAs. | Renqiu Huang, Ranga Vemuri |
| 2005 | VLSID | On-Line Synthesis for Partially Reconfigurable FPGAs. | Renqiu Huang, Ranga Vemuri |
| 2004 | FPL | Analysis of a Hybrid Interconnect Architecture for Dynamically Reconfigurable FPGAs. | Renqiu Huang, Manish Handa, Ranga Vemuri |
| 2004 | ICCAD | Analysis and evaluation of a hybrid interconnect structure for FPGAs. | Renqiu Huang, Ranga Vemuri |
| 2003 | FPL | A Statistical Analysis Tool for FPLD Architectures. | Renqiu Huang, Tommy Cheung, Ted Chi-Wah Kok |