Riad Stefo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2001–2001
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2001 | FPL | FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding. | Riad Stefo, Jos Luis Nez, Claudia Feregrino, Sudipta Mahapatra, Simon R. Jones |