| 2023 | DSD | Polymorphic RTL Computational Elements. | Richard Ruzicka, Vclav Simek, Jan Nevoral |
| 2022 | DSD | Technology Mapping for PAIG Optimised Polymorphic Circuits. | Richard Ruzicka, Vclav Simek |
| 2020 | DDECS | KL-cuts influence on optimization of polymorphic circuits based on PAIG rewriting. | Adam Crha, Vclav Simek, Richard Ruzicka |
| 2020 | DDECS | Power Consumption Analysis of New Generation of Polymorphic Gates. | Jan Nevoral, Vclav Simek, Richard Ruzicka |
| 2019 | DSD | PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. | Adam Crha, Vclav Simek, Richard Ruzicka |
| 2019 | DSD | PoLibSi: Path Towards Intrinsically Reconfigurable Components. | Jan Nevoral, Vclav Simek, Richard Ruzicka |
| 2018 | DSD | From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. | Jan Nevoral, Richard Ruzicka, Vclav Simek |
| 2012 | DDECS | NAND/NOR gate polymorphism in low temperature environment. | Richard Ruzicka, Vclav Simek |
| 2011 | DDECS | Behavior of CMOS polymorphic circuits in high temperature environment. | Richard Ruzicka, Vclav Simek, Luks Sekanina |
| 2011 | DSD | Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. | Richard Ruzicka, Vclav Simek |
| 2010 | DDECS | On analysis of fabricated polymorphic circuits. | Vclav Simek, Richard Ruzicka, Luks Sekanina |
| 2010 | DSD | Gracefully Degrading Circuit Controllers Based on Polytronics. | Richard Ruzicka |
| 2009 | DSD | Dependable Controller Design Using Polymorphic Counters. | Richard Ruzicka |
| 2008 | IOLTS | Physical Demonstration of Polymorphic Self-Checking Circuits. | Richard Ruzicka, Luks Sekanina, Roman Prokop |
| 2007 | DSD | Test Controller Synthesis Constrained by Circuit Testability Analysis. | Richard Ruzicka, Josef Strnadel |
| 2003 | DSD | Testable Design Verification Using Petri Nets. | Richard Ruzicka |