Robert G. Clapp
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2011–2011
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | FPGA | Eliminating the memory bottleneck: an FPGA-based solution for 3d reverse time migration. | Haohuan Fu, Robert G. Clapp |