Robert J. Gebotys
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
1998–2002
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | CHES | Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor. | Catherine H. Gebotys, Robert J. Gebotys |
| 2000 | DAC | Power minimization derived from architectural-usage of VLIW processors. | Catherine H. Gebotys, Robert J. Gebotys, S. Wiratunga |
| 1998 | ISLPED | An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors. | Catherine H. Gebotys, Robert J. Gebotys |