Skip to content

Roger F. Woods

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

48

Venues

15

Active years

1988–2025

Best venue rank

Multiconference

Where they publish

Papers

48 indexed papers, newest first.

YearVenueTitleAuthors
2025ICINCOPredictive Quality of In-Fabrication Products in Smart Manufacturing Using Graph-Based Deep Learning.Peter Davison, Muhammad Fahim, Roger F. Woods, Scott Fischaber, Marcus Haron, Cormac McAteer
2021ICFECTOD: Transprecise Object Detection to Maximise Real-Time Accuracy on the Edge.JunKyu Lee, Blesson Varghese, Roger F. Woods, Hans Vandierendonck
2018FPLFacilitating Easier Access to FPGAs in the Heterogeneous Cloud Ecosystems.Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis
2018PIMRCOpportunistic Non-Orthogonal Multiple Access Scheme with Unreliable Wireless Backhauls.Sunyoung Lee, Trung Quang Duong, Roger F. Woods
2016ACSSCOn spatial security outage probability derivation of exposure region based beamforming with randomly located eavesdroppers.Yuanrui Zhang, Youngwook Ko, Roger F. Woods, Alan Marshall, Joe Cavallaro, Kaipeng Li
2016ACSSCOn spatial security outage probability derivation of exposure region based beamforming with randomly located eavesdroppers.Yuanrui Zhang, Youngwook Ko, Roger F. Woods, Alan Marshall, Joe Cavallaro, Kaipeng Li
2016CBMSProposing the Deep Dynamic Bayesian Network as a Future Computer Based Medical System.Caoimhe M. Carbery, Adele H. Marshall, Roger F. Woods
2015GLOBECOMVerification of Key Generation from Individual OFDM Subcarrier's Channel Response.Junqing Zhang, Roger F. Woods, Alan Marshall, Trung Quang Duong
2015ICASSPAn effective key generation system using improved channel reciprocity.Junqing Zhang, Roger F. Woods, Alan Marshall, Trung Quang Duong
2014ACSSCDataflow toolset for soft-core processors on FPGA for image processing applications.Burak Bardak, Fahad Manzoor Siddiqui, Colm Kelly, Roger F. Woods
2014ACSSCInvestigation of secure wireless regions using configurable beamforming on WARP.Yuanrui Zhang, Bei Yin, Roger F. Woods, Joseph R. Cavallaro, Alan Marshall, Youngwook Ko
2014GLOBECOMSecure key generation from OFDM subcarriers' channel responses.Junqing Zhang, Alan Marshall, Roger F. Woods, Trung Quang Duong
2014PIMRCCreating secure wireless regions using configurable beamforming.Yuanrui Zhang, Alan Marshall, Roger F. Woods, Youngwook Ko
2013ACSSCImplementation of selective packet destruction on wireless open-access research platform.S. Hughes, B. Zhou, Roger F. Woods, Alan Marshall
2012ACSSCSession TA5b: Computer arithmetic accelerators for signal processing.Roger F. Woods
2011ACSSCSession MA8b1: Computer arithmetic I.Roger F. Woods
2011ACSSCDesign and implementation of a flexible Queue Manager for Next Generation Networks.Qi Zhang, Roger F. Woods, Alan Marshall
2010ICASSPAdapting noisy speech models - Extended uncertainty decoding.Jianhua Lu, Ji Ming, Roger F. Woods
2009InterspeechReplacing uncertainty decoding with subband re-estimation for large vocabulary speech recognition in noise.Jianhua Lu, Ji Ming, Roger F. Woods
2008FPLPower efficient DSP datapath configuration methodology for FPGA.Stephen McKeown, Roger F. Woods, John McAllister
2008InterspeechCombining noise compensation and missing-feature decoding for large vocabulary speech recognition in noise.Jianhua Lu, Ji Ming, Roger F. Woods
2008NOMSA real-time flow monitor architecture encompassing on-demand monitoring functions.John McGlone, Alan Marshall, Roger F. Woods
2007FPLSoft IP core implementation of recursive least squares filter using only multplicative and additive operators.Gaye Lightbody, Roger F. Woods, Jonathan Francey
2006ISCCProviding Input-Output Throughput Guarantees in a Buffered Crossbar Switch.Shane O'Neill, Alan Marshall, Roger F. Woods
2005ICASSPImplementation of finite difference schemes for the wave equation on FPGA.Erdem Motuk, Roger F. Woods, Stefan Bilbao
2005ICASSPRapid generation of hardware functionality in heterogeneous platforms [FPGA implementation applications].Darren Gerard Reilly, Roger F. Woods, John McAllister, Richard L. Walke
2005NetworkingA Novel Packet Marking Function for Real-Time Interactive MPEG-4 Video Applications in a Differentiated Services Network.Shane O'Neill, Alan Marshall, Roger F. Woods
2003FPLDesign Flow for Efficient FPGA Reconfiguration.Richard H. Turner, Roger F. Woods
2002FCCMMapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXes.Tim Courtney, Richard H. Turner, Roger F. Woods
2002FPLMultiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs.Richard H. Turner, Roger F. Woods, Tim Courtney
2001FPLVirtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver.Lok-Kee Ting, Roger F. Woods, Colin Cowan
2001ICASSPImplementation of fixed DSP functions using the reduced coefficient multiplier.Richard H. Turner, Tim Courtney, Roger F. Woods
2000FCCMAn Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing.Tim Courtney, Richard H. Turner, Roger F. Woods
2000FPLMultiplexer Based Reconfiguration for Virtex Multipliers.Tim Courtney, Richard H. Turner, Roger F. Woods
1999FCCMAccelerating Run-Time Reconfiguration on FCCMs.Jean-Paul Heron, Roger F. Woods
1999FCCMA Virtual Hardware Handler for RTR Systems.Richard H. Turner, Roger F. Woods, Sakir Sezer, Jean-Paul Heron
1999ICASSPNovel mapping of a linear QR architecture.Gaye Lightbody, Richard L. Walke, Roger F. Woods, John V. McCanny
1998FCCMFast Partial Reconfiguration for FCCMs.Sakir Sezer, Roger F. Woods, Jean-Paul Heron, Alan Marshall
1998ISLPEDThe impact of data characteristics and hardware topology on hardware selection for low power DSP.Gareth Keane, Jonathan R. Spanier, Roger F. Woods
1997FCCMFPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again).Roger F. Woods, Stefan H.-M. Ludwig, Jean-Paul Heron, David W. Trainor, Stephan W. Gehring
1996FCCMVLSI architectures for field programmable gate arrays: a case study.Roger F. Woods, A. Cassidy, J. Gray
1996FPLArchitectural Strategies for Implementing an Image Processing Algorithm on XC6000 FPGA.Jean-Paul Heron, Roger F. Woods
1996FPLArchitectural Synthesis and Efficient Circuit Implementation for Field Programmable Gate Arrays.David W. Trainor, Roger F. Woods
1992ICASSPThe systematic design of high performance digital filters.B. P. McGovern, Roger F. Woods, John V. McCanny
1990ICASSPPipelined two-port adaptor for wave digital filtering.Rajinder Jit Singh, John V. McCanny, Roger F. Woods
1990ICCDOptimized bit level architectures for IIR filtering.O. C. McNally, John V. McCanny, Roger F. Woods
1989ICASSPA bit-level systolic architecture for very high performance IIR filters.Simon C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny
1988ICASSPSystolic IIR filters with bit level pipelining.Roger F. Woods, Simon C. Knowles, John V. McCanny, John G. McWhirter