| 2016 | COMPSAC | Model-Driven Optimization of Data-Adaptable Embedded Systems. | Adrian Lizarraga, Roman L. Lysecky, Jonathan Sprinkle |
| 2015 | FIE | Students learn more with less text that covers the same core topics. | Alex D. Edgcomb, Frank Vahid, Roman L. Lysecky |
| 2012 | MODELS | An overseer control methodology for data adaptable embedded systems. | Sean Whitsitt, Jonathan Sprinkle, Roman L. Lysecky |
| 2011 | ASPDAC | Profile assisted online system-level performance and power estimation for dynamic reconfigurable embedded systems. | Jingqing Mu, Roman L. Lysecky |
| 2010 | ASPDAC | Workload capacity considering NBTI degradation in multi-core systems. | Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang |
| 2010 | ICCAD | A self-evolving design methodology for power efficient multi-core systems. | Jin Sun, Rui Zheng, Jyothi Velamala, Yu Cao, Roman L. Lysecky, Karthik Shankar, Janet Meiling Wang Roveda |
| 2010 | WiMob | A lightweight dynamic optimization methodology for wireless sensor networks. | Arslan Munir, Ann Gordon-Ross, Susan Lysecky, Roman L. Lysecky |
| 2009 | DAC | Non-intrusive dynamic application profiling for multitasked applications. | Karthik Shankar, Roman L. Lysecky |
| 2008 | CASES | Non-intrusive dynamic application profiler for detailed loop execution characterization. | Ajay Nair, Roman L. Lysecky |
| 2007 | DATE | Low-power warp processor for power efficient high-performance embedded systems. | Roman L. Lysecky |
| 2006 | ICCAD | Application-specific customization of parameterized FPGA soft-core processors. | David Sheldon, Rakesh Kumar, Roman L. Lysecky, Frank Vahid, Dean M. Tullsen |
| 2006 | ICCAD | Conjoining soft-core FPGA processors. | David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky |
| 2005 | DATE | A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning. | Roman L. Lysecky, Frank Vahid |
| 2005 | FCCM | A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation. | Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan |
| 2005 | FPGA | Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only). | Roman L. Lysecky, Kris Miller, Frank Vahid, Kees A. Vissers |
| 2004 | DAC | Dynamic FPGA routing for just-in-time FPGA compilation. | Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan |
| 2004 | DATE | A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning. | Roman L. Lysecky, Frank Vahid |
| 2004 | DATE | A Self-Tuning Cache Architecture for Embedded Systems. | Chuanjun Zhang, Frank Vahid, Roman L. Lysecky |
| 2003 | DAC | On-chip logic minimization. | Roman L. Lysecky, Frank Vahid |
| 2003 | DAC | Dynamic hardware/software partitioning: a first approach. | Greg Stitt, Roman L. Lysecky, Frank Vahid |
| 2002 | DAC | A fast on-chip profiler memory. | Roman L. Lysecky, Susan Cotterell, Frank Vahid |
| 2000 | CASES | A first-step towards an architecture tuning methodology for low power. | Greg Stitt, Frank Vahid, Tony Givargis, Roman L. Lysecky |
| 2000 | DATE | Techniques for Reducing Read Latency of Core Bus Wrappers. | Roman L. Lysecky, Frank Vahid, Tony Givargis |