| 2025 | FPL | Virtualization and Dynamic Reconfiguration of Custom Instruction Accelerators (CIA) in RISC-V Embedded Systems. | Bea Healy, Brandon Freiberger, Jonas Kuenstler, King Lok Chung, Emil Cozac, Meinhard Kissich, Gennadiy Knis, Ron Sass, Dirk Koch, Jan Gray, Guy Lemieux |
| 2018 | FCCM | Bridging the Gap between Advanced Memory and Heterogeneous Architectures. | Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt, Matthew French |
| 2014 | DSN | Harnessing Unreliable Cores in Heterogeneous Architecture: The PyDac Programming Model and Runtime. | Bin Huang, Ron Sass, Nathan DeBardeleben, Sean Blanchard |
| 2013 | EuroPar | PyDac: A Resilient Run-Time Framework for Divide-and-Conquer Applications on a Heterogeneous Many-Core Architecture. | Bin Huang, Ron Sass, Nathan DeBardeleben, Sean Blanchard |
| 2013 | EuroPar | A Novel Memory Subsystem and Computational Model for Parallel Reconfigurable Architectures. | Yamuna Rajasekhar, Ron Sass |
| 2013 | FCCM | A Range and Scaling Study of an FPGA-Based Digital Wireless Channel Emulator. | Scott Buscemi, William V. Kritikos, Ron Sass |
| 2013 | FCCM | The Impact of Hardware Communication on a Heterogeneous Computing System. | Shanyuan Gao, Bin Huang, Ron Sass |
| 2013 | FPL | Performance evaluation of Sparse Matrix-Matrix Multiplication. | Shweta Jain-Mendon, Ron Sass |
| 2012 | DSN | Design and implementation of a hardware checkpoint/restart core. | Ashwin A. Mendon, Ron Sass, Zachary K. Baker, Justin L. Tripp |
| 2012 | FCCM | An Extensible and Portable Tool Suite for Managing Multi-Node FPGA Systems. | Yamuna Rajasekhar, Rahul R. Sharma, Ron Sass |
| 2012 | FPL | Design and utilization of an FPGA cluster to implement a Digital Wireless Channel Emulator. | Scott Buscemi, Ron Sass |
| 2012 | FPL | A high performance, open source SATA2 core. | Ashwin A. Mendon, Bin Huang, Ron Sass |
| 2011 | FCCM | Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. | Andrew G. Schmidt, Bin Huang, Ron Sass, Matthew French |
| 2011 | FPL | A Radix Tree Router for Scalable FPGA Networks. | William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass |
| 2010 | SC | Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring. | Bin Huang, Andrew G. Schmidt, Ashwin A. Mendon, Ron Sass |
| 2009 | FCCM | RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function. | Siddhartha Datta, Parag Beeraka, Ron Sass |
| 2009 | FCCM | AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. | Andrew G. Schmidt, William V. Kritikos, Rahul R. Sharma, Ron Sass |
| 2009 | FPGA | A parallel/vectorized double-precision exponential core to accelerate computational science applications. | Robin Pottathuparambil, Ron Sass |
| 2009 | FPL | Hardware implementation of MPI_Barrier on an FPGA cluster. | Shanyuan Gao, Andrew G. Schmidt, Ron Sass |
| 2008 | FCCM | FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. | Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass |
| 2008 | FCCM | Reconfigurable Computing Cluster Project: Phase I Brief. | Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass |
| 2008 | FPL | Teaching FPGA system design via a remote laboratory facility. | Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass |
| 2007 | FCCM | RBoot: Software Infrastructure for a Remote FPGA Laboratory. | Kushal Datta, Ron Sass |
| 2007 | FCCM | Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. | Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka |
| 2007 | FCCM | Quantifying Effective Memory Bandwidth of Platform FPGAs. | Andrew G. Schmidt, Ron Sass |
| 2007 | FPL | Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. | Andrew G. Schmidt, Ron Sass |
| 2006 | FCCM | Enabling a Uniform Programming Model Across the Software/Hardware Boundary. | Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David Andrews |
| 2006 | RTSS | Run-Time Services for Hybrid CPU/FPGA Systems on Chip. | Jason Agron, Wesley Peck, Erik K. Anderson, David Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens |
| 2005 | FCCM | A Virtual Machine for Merit-Based Runtime Reconfiguration. | Brian Greskamp, Ron Sass |
| 2004 | EUC | FERP Interface and Interconnect Cores for Stream Processing Applications. | Jeff Young, Ron Sass |
| 2004 | FPGA | Automatic discovery, selection, and specialization of modules in RCADE. | Ranjesh G. Jaganathan, Matthew Simpson, Ron Sass |
| 2004 | FPGA | Online placement infrastructure to support run-time reconfiguration. | Brian Leonard, Jeff Young, Ron Sass |
| 2004 | HIPS | Arches: An Infrastructure for PSE Development. | Nathan DeBardeleben, Walter B. Ligon III, Ron Sass |
| 2003 | SC | A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. | Ranjesh G. Jaganathan, Keith D. Underwood, Ron Sass |
| 2001 | CLUSTER | A Reconfigurable Extension to the Network Interface of Beowulf Clusters. | Keith D. Underwood, Ron Sass, Walter B. Ligon III |
| 1995 | INFOCOM | Statistical Characteristics and Multiplexing of MPEG Streams. | Marwan Krunz, Ron Sass, Herman D. Hughes |
| 1994 | SC | Enabling unimodular transformations. | Ron Sass, Matt W. Mutka |