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Ronald G. Dreslinski

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

64

Venues

19

Active years

2006–2025

Best venue rank

A*

Where they publish

Papers

64 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCANMP-PaK: Near-Memory Processing Acceleration of Scalable De Novo Genome Assembly.Heewoo Kim, Sanjay Sri Vallabh Singapuram, Haojie Ye, Joseph Izraelevitz, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
2023ASPLOSGRACE: A Scalable Graph-Based Approach to Accelerating Recommendation Model Inference.Haojie Ye, Sanketh Vedula, Yuhan Chen, Yichen Yang, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati
2023ICCADFuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method.Morteza Fayazi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ehsan Afshari, Ronald G. Dreslinski
2023ISLPEDRecPIM: A PIM-Enabled DRAM-RRAM Hybrid Memory System For Recommendation Models.Heewoo Kim, Haojie Ye, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
2023SPPCSPOOF: Compromising the Safety of Time-Triggered Ethernet.Andrew D. Loveless, Linh Thi Xuan Phan, Ronald G. Dreslinski, Baris Kasikci
2022DATESiC Processors for Extreme High- Temperature Venus Surface Exploration.Heewoo Kim, Javad Bagherzadeh, Ronald G. Dreslinski
2022ISCAMeNDA: a near-memory multi-way merge solution for sparse transposition and dataflows.Siying Feng, Xin He, Kuan-Yu Chen, Liu Ke, Xuan Zhang, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2022ISCANDMiner: accelerating graph pattern mining using near data processing.Nishil Talati, Haojie Ye, Yichen Yang, Leul Belayneh, Kuan-Yu Chen, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2022ISCASEnabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor.Daniel W. Bliss, Tutu Ajayi, Ali Akoglu, Ilkin Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John S. Brunhaver, Chaitali Chakrabarti, Liangliang Chang, Kuan-Yu Chen, Ming-Hung Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Yukang Fu, A. Alper Goksoy, Xin He, Md Sahil Hassan, Andrew Herschfelt, Jacob Holtom, Hun-Seok Kim, A. N. Krishnakumar, Yang Li, Owen Ma, Joshua Mack, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, Brittany M. McCall, Trevor N. Mudge, mit Y. Ogras, Vishrut Pandey, Saquib Ahmad Siddiqui, Yu-Hsiu Sun, Adarsh A. Venkataramani, Xiangdong Wei, B. R. Willis, Hanguang Yu, Yufan Yue
2022ISCASImproving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration.Yan Xiong, Jingtao Li, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2022ISLPEDA Unified Forward Error Correction Accelerator for Multi-Mode Turbo, LDPC, and Polar Decoding.Yufan Yue, Tutu Ajayi, Xueyang Liu, Peiwen Xing, Zihan Wang, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
2022MICROMint: An Accelerator For Mining Temporal Motifs.Nishil Talati, Haojie Ye, Sanketh Vedula, Kuan-Yu Chen, Yuhan Chen, Daniel Liu, Yichao Yuan, David T. Blaauw, Alex M. Bronstein, Trevor N. Mudge, Ronald G. Dreslinski
2021DACCoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics.Siying Feng, Jiawen Sun, Subhankar Pal, Xin He, Kuba Kaszyk, Dong-Hyeon Park, John Magnus Morton, Trevor N. Mudge, Murray Cole, Michael F. P. O'Boyle, Chaitali Chakrabarti, Ronald G. Dreslinski
2021HPCAProdigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design.Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski
2021MICROSparseAdapt: Runtime Control for Sparse Linear Algebra on a Reconfigurable Accelerator.Subhankar Pal, Aporva Amarnath, Siying Feng, Michael F. P. O'Boyle, Ronald G. Dreslinski, Christophe Dubach
2021MICROF1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption.Nikola Samardzic, Axel Feldmann, Aleksandar Krastev, Srinivas Devadas, Ronald G. Dreslinski, Christopher Peikert, Daniel Snchez
2021SIGCSERISC-V Reward: Building Out-of-Order Processors in a Computer Architecture Design Course with an Open-Source ISA.Stephen A. Zekany, Jielun Tan, James A. Connelly, Ronald G. Dreslinski
2021USENIXImproving Performance of Flash Based Key-Value Stores Using Storage Class Memory as a Volatile Memory Extension.Hiwot Tadese Kassa, Jason Akers, Mrinmoy Ghosh, Zhichao Cao, Vaibhav Gogte, Ronald G. Dreslinski
2021RTASIGOR: Accelerating Byzantine Fault Tolerance for Real-Time Systems with Eager Execution.Andrew D. Loveless, Ronald G. Dreslinski, Baris Kasikci, Linh Thi Xuan Phan
2020DACR2D3: A Reliability Engine for 3D Parallel Systems.Javad Bagherzadeh, Aporva Amarnath, Jielun Tan, Subhankar Pal, Ronald G. Dreslinski
2020ICASSPAccelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture.A. Soorishetty, Jian Zhou, Subhankar Pal, David T. Blaauw, H. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2020ICSSparse-TPU: adapting systolic arrays for sparse matrices.Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Kuan-Yu Chen, Ronald G. Dreslinski, Trevor N. Mudge
2020ISCASAccelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture.Yan Xiong, Jian Zhou, Subhankar Pal, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
2020ISPASSPerformance Characterization of Lattice-Based Cryptography Workloads.Deepika Natarajan, Ronald G. Dreslinski
2019DACTetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging.Brendan L. West, Jian Zhou, Ronald G. Dreslinski, J. Brian Fowlkes, Oliver Kripfgans, Chaitali Chakrabarti, Thomas F. Wenisch
2019ISLPED3DTUBE: A Design Framework for High-Variation Carbon Nanotube-based Transistor Technology.Aporva Amarnath, Javad Bagherzadeh, Jielun Tan, Ronald G. Dreslinski
2019ISPASSParallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective.Siying Feng, Subhankar Pal, Yichen Yang, Ronald G. Dreslinski
2018HPCAOuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator.Subhankar Pal, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
2017ISLPEDA carbon nanotube transistor based RISC-V processor using pass transistor logic.Aporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski
2016DACNear-threshold computing in FinFET technologies: opportunities for improved voltage scalability.Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2016HPCAA low power software-defined-radio baseband processor for the Internet of Things.Yajing Chen, Shengshuo Lu, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge
2016ISLPEDEnhancing DRAM Self-Refresh for Idle Power Reduction.Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge
2015ASPLOSSirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers.Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
2015HPCAAdrenaline: Pinpointing and reining in tail queries with quick voltage boosting.Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Jason Mars, Lingjia Tang, Ronald G. Dreslinski
2015ISCADjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers.Johann Hauswald, Yiping Kang, Michael A. Laurenzano, Quan Chen, Cheng Li, Trevor N. Mudge, Ronald G. Dreslinski, Jason Mars, Lingjia Tang
2015ISCAMBus: an ultra-low power interconnect bus for next generation nanopower systems.Pat Pannuto, Yoonmyung Lee, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta
2015ISPASSA study of mobile device utilization.Cao Gao, Anthony Gutierrez, Madhav Rajan, Ronald G. Dreslinski, Trevor N. Mudge, Carole-Jean Wu
2015MICROWarpPool: sharing requests with inter-warp coalescing for throughput processors.John Kloosterman, Jonathan Beaumont, Mick Wollman, Ankit Sethia, Ronald G. Dreslinski, Trevor N. Mudge, Scott A. Mahlke
2014ASPLOSIntegrated 3D-stacked server designs for increasing physical density of key-value stores.Anthony Gutierrez, Michael Cieslak, Bharan Giridhar, Ronald G. Dreslinski, Luis Ceze, Trevor N. Mudge
2014DACQuality-of-Service for a High-Radix Switch.Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge
2014DACVIX: Virtual Input Crossbar for Efficient Switch Allocation.Supriya Rao, Supreet Jeloka, Reetuparna Das, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge
2014ICASSPA hybrid approach to offloading mobile image classification.Johann Hauswald, Thomas Manville, Q. Zheng, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge
2014ISPASSA study of Thread Level Parallelism on mobile devices.Cao Gao, Anthony Gutierrez, Ronald G. Dreslinski, Trevor N. Mudge, Krisztin Flautner, Geoffrey Blake
2014ISPASSSources of error in full-system simulation.Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel C. Paver
2014MICROHi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration.Supreet Jeloka, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw
2013HPCAScaling towards kilo-core processors with asymmetric high-radix topologies.Nilmini Abeyratne, Reetuparna Das, Qingkun Li, Korey Sewell, Bharan Giridhar, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge
2013ISCACatnap: energy proportional multiple network-on-chip.Reetuparna Das, Satish Narayanasamy, Sudhir Satpathy, Ronald G. Dreslinski
2013ISCASParallelization techniques for implementing trellis algorithms on graphics processors.Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
2013ISLPEDHardware acceleration for similarity measurement in natural language processing.Prateek Tandon, Vahed Qazvinian, Jichuan Chang, Parthasarathy Ranganathan, Ronald G. Dreslinski, Thomas F. Wenisch
2013SCExploring DRAM organizations for energy-efficient and resilient exascale memories.Bharan Giridhar, Michael Cieslak, Deepankar Duggal, Ronald G. Dreslinski, Hsing Min Chen, Robert Patti, Betina Hold, Chaitali Chakrabarti, Trevor N. Mudge, David T. Blaauw
2012CASESLazy cache invalidation for self-modifying codes.Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge
2012DACAssessing the performance limits of parallelized near-threshold computing.Nathaniel Ross Pinckney, Korey Sewell, Ronald G. Dreslinski, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012DACHigh radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service.Sudhir Satpathy, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
2012DACProcess variation in near-threshold wide SIMD architectures.Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David T. Blaauw, Trevor N. Mudge
2012ICCDEmbedded way prediction for last-level caches.Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch
2012MICROComposite Cores: Pushing Heterogeneity Into a Core.Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke
2011DATELow power interconnects for SIMD computers.Mark Woh, Sudhir Satpathy, Ronald G. Dreslinski, Danny Kershaw, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge
2011HPCABloom Filter Guided Transaction Scheduling.Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge
2010ISCAEvolution of thread-level parallelism in desktop applications.Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge, Krisztin Flautner
2010ISLPEDDiet SODA: a power-efficient processor for digital cameras.Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge
2009MICROProactive transaction scheduling for contention management.Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge
2008MICROReconfigurable energy efficient near threshold cache architectures.Ronald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David T. Blaauw, Dennis Sylvester, Krisztin Flautner
2007ISLPEDEnergy efficient near-threshold chip multi-processing.Bo Zhai, Ronald G. Dreslinski, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester
2006ASPLOSPicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor.Taeho Kgil, Shaun D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztin Flautner