| 2026 | ASPDAC | C3PO: Commercial-Quality Global Placement via Coherent, Concurrent Timing, Routability, and Wirelength Optimization. | Yi-Chen Lu, Hao-Hsiang Hsiao, Rongjian Liang, Wen-Hao Liu, Haoxing Ren |
| 2026 | FCCM | LegoMap: Optimization for High-Throughput Transformer Computing on AI Engine-Based FPGAs. | Hailiang Hu, Haodong Chang, Donghao Fang, Zhenrui Wang, Wuxi Li, Rongjian Liang, Bo Yuan, Jiang Hu |
| 2025 | DAC | DCO-3D: Differentiable Congestion Optimization in 3D ICs. | Hao-Hsiang Hsiao, Yi-Chen Lu, Pruek Vanna-Iampikul, Anthony Agnesina, Rongjian Liang, Yuan-Hsiang Lu, Haoxing Ren, Sung Kyu Lim |
| 2025 | DAC | Reinforcement Learning-Driven Window Selection for Enhanced Window-Based Rip-up and Reroute in Chip Detailed Routing. | Yu-Chan Keng, Yu-Chun Pai, Wen-Hao Liu, Haoxing Ren, Danny Liu, Rongjian Liang, Mark Ho, Anthony Agnesina, Yih-Lang Li |
| 2025 | DAC | INSTA: An Ultra-Fast, Differentiable, Statistical Static Timing Analysis Engine for Industrial Physical Design Applications. | Yi-Chen Lu, Zhizheng Guo, Kishor Kunal, Rongjian Liang, Haoxing Ren |
| 2025 | DATE | Hybrid Exact and Heuristic Efficient Transistor Network Optimization for Multi-Output Logic. | Lang Feng, Rongjian Liang, Hongxin Kong |
| 2025 | ICCAD | Invited Paper: 2025 ICCAD CAD Contest Problem C: Incremental Placement Optimization Beyond Detailed Placement: Simultaneous Gate Sizing, Buffering, and Cell Relocation. | Yi-Chen Lu, Rongjian Liang, Wen-Hao Liu, Haoxing Ren |
| 2025 | ICCAD | LLM4Verilog: Building Large-Scale, High-Quality Data Infrastructure for Verilog Code Generation via Community Efforts. | Zhongzhi Yu, Chaojian Li, Yongan Zhang, Mingjie Liu, Nathaniel Ross Pinckney, Wenfei Zhou, Rongjian Liang, Haoyu Yang, Haoxing Ren, Yingyan Celine Lin |
| 2025 | MICRO | Crane: Inter-Layer Scheduling Framework for DNN Inference and Training Co-Support on Tiled Architecture. | Yu Gong, Lingyi Huang, Haodong Chang, Rongjian Liang, Cheng Yang, Zhexiang Tang, Jiang Hu, Bo Yuan |
| 2024 | DAC | DGR: Differentiable Global Router. | Wei Li, Rongjian Liang, Anthony Agnesina, Haoyu Yang, Chia-Tung Ho, Anand Rajaram, Haoxing Ren |
| 2024 | DATE | DiMO-Sparse: Differentiable Modeling and Optimization of Sparse CNN Dataflow and Hardware Architecture. | Jianfeng Song, Rongjian Liang, Yu Gong, Bo Yuan, Jiang Hu |
| 2024 | ICCAD | 2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing Using ML Techniques and GPU Acceleration. | Bing-Yue Wu, Rongjian Liang, Geraldo Pradipta, Anthony Agnesina, Haoxing Ren, Vidya A. Chhabria |
| 2024 | ICCAD | Invited Paper: LLM4HWDesign Contest: Constructing a Comprehensive Dataset for LLM-Assisted Hardware Code Generation with Community Efforts. | Zhongzhi Yu, Chaojian Li, Yongan Zhang, Mingjie Liu, Nathaniel Ross Pinckney, Wenfei Zhou, Haoyu Yang, Rongjian Liang, Haoxing Ren, Yingyan Celine Lin |
| 2024 | VTS | OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education. | Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Rongjian Liang, Haoxing Ren, Sachin S. Sapatnekar, Bing-Yue Wu |
| 2023 | ASPDAC | BufFormer: A Generative ML Framework for Scalable Buffering. | Rongjian Liang, Siddhartha Nath, Anand Rajaram, Jiang Hu, Haoxing Ren |
| 2023 | DAC | Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation. | Rongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany |
| 2023 | ICCAD | Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization. | Rongjian Liang, Anthony Agnesina, Geraldo Pradipta, Vidya A. Chhabria, Haoxing Ren |
| 2022 | ASPDAC | Mapping Large Scale Finite Element Computing on to Wafer-Scale Engines. | Yishuang Lin, Rongjian Liang, Yaguang Li, Hailiang Hu, Jiang Hu |
| 2022 | ICCAD | Deep Learning Toolkit-Accelerated Analytical Co-Optimization of CNN Hardware and Dataflow. | Rongjian Liang, Jianfeng Song, Bo Yuan, Jiang Hu |
| 2022 | ICCAD | A Stochastic Approach to Handle Non-Determinism in Deep Learning-Based Design Rule Violation Predictions. | Rongjian Liang, Hua Xiang, Jinwook Jung, Jiang Hu, Gi-Joon Nam |
| 2021 | ASPDAC | Net2: A Graph Attention Network Method Customized for Pre-Placement Net Length Estimation. | Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Yixiao Duan, Yiran Chen |
| 2021 | ICCAD | Automatic Routability Predictor Development Using Neural Architecture Search. | Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chung-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, Yiran Chen |
| 2021 | ICCAD | FlowTuner: A Multi-Stage EDA Flow Tuner Exploiting Parameter Knowledge Transfer. | Rongjian Liang, Jinwook Jung, Hua Xiang, Lakshmi N. Reddy, Alexey Lvov, Jiang Hu, Gi-Joon Nam |
| 2020 | ICCAD | Routing-Free Crosstalk Prediction. | Rongjian Liang, Zhiyao Xie, Jinwook Jung, Vishnavi Chauha, Yiran Chen, Jiang Hu, Hua Xiang, Gi-Joon Nam |