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Ruchir Puri

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

49

Venues

14

Active years

1991–2025

Best venue rank

A*

Where they publish

Papers

49 indexed papers, newest first.

YearVenueTitleAuthors
2025AAAIAgent Trajectory Explorer: Visualizing and Providing Feedback on Agent Trajectories.Michael Desmond, Ja Young Lee, Ibrahim Ibrahim, James M. Johnson, Avirup Sil, Justin MacNair, Ruchir Puri
2025ICMLITBench: Evaluating AI Agents across Diverse Real-World IT Automation Tasks.Saurabh Jha, Rohan R. Arora, Yuji Watanabe, Takumi Yanagawa, Yinfang Chen, Jackson Clark, Bhavya, Mudit Verma, Harshit Kumar, Hirokuni Kitahara, Noah Zheutlin, Saki Takano, Divya Pathak, Felix George, Xinbo Wu, Bekir O. Turkkan, Gerard Vanloo, Michael Nidd, Ting Dai, Oishik Chatterjee, Pranjal Gupta, Suranjana Samanta, Pooja Aggarwal, Rong Lee, Jae-wook Ahn, Debanjana Kar, Amit M. Paradkar, Yu Deng, Pratibha Moogi, Prateeti Mohapatra, Naoki Abe, Chandrasekhar Narayanaswami, Tianyin Xu, Lav R. Varshney, Ruchi Mahindru, Anca Sailer, Laura Shwartz, Daby Sow, Nicholas C. Fuller, Ruchir Puri
2024QCEQiskit HumanEval: An Evaluation Benchmark for Quantum Code Generative Models.Sanjay Vishwakarma, Francis Harkins, Siddharth Golecha, Vishal Sharathchandra Bajpe, Nicolas Dupuis, Luca Buratti, David Kremer, Ismael Faro, Ruchir Puri, Juan Cruz-Benito
2023DACInvited: Automated Code generation for Information Technology Tasks in YAML through Large Language Models.Saurabh Pujar, Luca Buratti, Xiaojie Guo, Nicolas Dupuis, Burn L. Lewis, Sahil Suneja, Atin Sood, Ganesh Nalawade, Matthew Jones, Alessandro Morari, Ruchir Puri
2021SERVICESEngineering the Future of AI for the Enterprises : Keynote 4.Ruchir Puri
2019ICASSPBias Mitigation Post-processing for Individual and Group Fairness.Pranay Kr. Lohia, Karthikeyan Natesan Ramamurthy, Manish Bhide, Diptikalyan Saha, Kush R. Varshney, Ruchir Puri
2015ASPDACPolynomial time algorithm for area and power efficient adder synthesis in high-performance designs.Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan
2015ISLPEDMessage from the program chairs.Ruchir Puri, Vijay Raghunathan
2014DATEEnergy-efficient hardware acceleration through computing in the memory.Somnath Paul, Robert Karam, Swarup Bhunia, Ruchir Puri
2014ICCADApplication driven high level design in the era of heterogeneous computing.Ruchir Puri
2014ISLPEDBridging high performance and low power in processor design.Ruchir Puri, Mihir R. Choudhury, Haifeng Qian, Matthew M. Ziegler
2013DACTowards optimal performance-area trade-off in adders by synthesis of parallel prefix structures.Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan
2013DATEIntuitive ECO synthesis for high performance circuits.Haoxing Ren, Ruchir Puri, Lakshmi N. Reddy, Smita Krishnaswamy, Cindy Washburn, Joel Earl, Joachim Keinert
2013ICCADLatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs.Minsik Cho, Hua Xiang, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri
2013ICCADDepth controlled symmetric function fanin tree restructure.Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri
2013VLSIDKeynote talk: Opportunities and challenges for high performance microprocessor designs and design automation.Ruchir Puri
2011DACDesign, CAD and technology challenges for future processors: 3D perspectives.Jeff Burns, Gary Carpenter, Eren Kursun, Ruchir Puri, James D. Warnock, Michael Scheuermann
2010DACHistory-based VLSI legalization using network flow.Minsik Cho, Haoxing Ren, Hua Xiang, Ruchir Puri
2010DACEDA challenges and options: investing for the future.Ruchir Puri, William H. Joyner, Raj Jammy, Ahmed Jerraya, Jan M. Rabaey, Walden C. Rhines, Leon Stok
2010ICCADNovel binary linear programming for high performance clock mesh synthesis.Minsik Cho, David Z. Pan, Ruchir Puri
2010VLSIDThe Dawn of 22nm Era: Design and CAD Challenges.Ruchir Puri, David S. Kung
2009ASPDACCAD challenges for 3D ICs.David S. Kung, Ruchir Puri
2009DACMoore's Law: another casualty of the financial meltdown?Jason Cong, N. S. Nagaraj, Ruchir Puri, William H. Joyner, Jeff Burns, Moshe Gavrielov, Riko Radojcic, Peter Rickert, Hans Stork
2009DACFrom milliwatts to megawatts: system level power challenge.Ruchir Puri, Eshel Haritan, Stan Krolikoski, Jason Cong, Tim Kogel, Bradley D. McCredie, John Shen, Andrs Takach
2009ICCADDeltaSyn: An efficient logic difference optimizer for ECO synthesis.Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri
2008DACCustom is from Venus and synthesis from Mars.Ruchir Puri, William H. Joyner, Shekhar Borkar, Ty Garibay, Jonathan Lotz, Robert K. Montoye
2008DACKeeping hot chips cool: are IC thermal problems hot air?Ruchir Puri, Devadas Varma, Darvin Edwards, Alan J. Weger, Paul D. Franzon, Andrew Yang, Stephen V. Kosonocky
2007DACInterconnects in the Third Dimension: Design Challenges for 3D ICs.Kerry Bernstein, Paul S. Andry, Jerome Cann, Philip G. Emma, David Greenberg, Wilfried Haensch, Mike Ignatowski, Steven J. Koester, John Magerlein, Ruchir Puri, Albert M. Young
2007DACTROY: Track Router with Yield-driven Wire Planning.Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
2007DACMaking Manufacturing Work For You.Srikanth Venkataraman, Ruchir Puri, Steve Griffith, Ankush Oberai, Robert Madge, Greg Yeric, Walter Ng, Yervant Zorian
2006DACGain-based technology mapping for minimum runtime leakage under input vector uncertainty.Ashish Kumar Singh, Murari Mani, Ruchir Puri, Michael Orshansky
2006ICCADWire density driven global routing for CMP variation and timing.Minsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri
2006ICCADDesign and CAD challenges in 45nm CMOS and beyond.David J. Frank, Ruchir Puri, Dorel Toma
2006VLSIDTechnology Impacts on Sub-90nm CMOS Circuit Design and Design Methodologies.Ruchir Puri, Tanay Karnik, Rajiv V. Joshi
2005DACKeeping hot chips cool.Ruchir Puri, Leon Stok, Subhrajit Bhattacharya
2005ISCASMinimizing power with flexible voltage islands.Ruchir Puri, David S. Kung, Leon Stok
2003DACPushing ASIC performance in a power envelope.Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni
2003ICCADDesign and CAD Challenges in sub-90nm CMOS Technologies.Kerry Bernstein, Ching-Te Chuang, Rajiv V. Joshi, Ruchir Puri
2000VLSIDSOI Digital Circuits: Design Issues.Ruchir Puri, Ching-Te Chuang
1999DACSOI Digital CMOS VLSI - a Design Perspective.Ching-Te Chuang, Ruchir Puri
1999ICCADOptimal P/N width ratio selection for standard cell libraries.David S. Kung, Ruchir Puri
1999ISLPEDHysteresis effect in floating-body partially-depleted SOI CMOS domino circuits.Ruchir Puri, Ching-Te Chuang
1998ICCDDesign issues in mixed static-domino circuit implementations.Ruchir Puri
1996ICCADLogic optimization by output phase assignment in dynamic logic synthesis.Ruchir Puri, Andrew Bjorksten, Thomas E. Rosser
1994DACA Modular Partitioning Approach for Asynchronous Circuit Synthesis.Ruchir Puri, Jun Gu
1994ICCDArea Efficient Synthesis of Asynchronous Interface Circuits.Ruchir Puri, Jun Gu
1993ISCASSignal Transition Graph Constraints for Speed-independent Ciruit Synthesis.Ruchir Puri, Jun Gu
1992DACAn Efficient algorithm for Microword Length Minimization.Ruchir Puri, Jun Gu
1991ICTAISearching for a minimal finite state automaton (FSA).Ruchir Puri, Jun Gu