Ryota Shioya
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
27
Venues
13
Active years
2006–2026
Best venue rank
A*
Where they publish
Papers
27 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCA | RUNLTS: Branch Prediction with Register-Value Correlations and Hierarchical Table Orchestration. | Toru Koizumi, Toshiki Maekawa, Masanari Mizuno, Maru Kuroki, Tomoaki Tsumura, Ryota Shioya |
| 2025 | ARITH | Trailing-Ones Anticipation for Reducing the Latency of the Rounding Incrementer in FP FMA Units. | Toru Koizumi, Ryota Shioya, Takuya Yamauchi, Tomoya Adachi, Ken Namura, Jun Makino |
| 2025 | ASPDAC | CACTI-CNFET: an Analytical Tool for Timing, Power, and Area of SRAMs with Carbon Nanotube Field Effect Transistors. | Shinobu Miwa, Eiichiro Sekikawa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, Hiroki Honda |
| 2025 | CC | Biotite: A High-Performance Static Binary Translator using Source-Level Information. | Changbin Chen, Shu Sugita, Yotaro Nada, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya |
| 2025 | ICCD | Register Bridging: A Lightweight Microarchitectural Approach for Skipping Overhead Instructions in Distance-Based ISA Processors. | Fan Yang, Toru Koizumi, Jun Li, Shu Sugita, Yuriko Yamauchi, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie |
| 2025 | IWSEC | Analyzing and Mitigating the SSB Vulnerability in an MDP-Equipped RISC-V Processor. | Tuo Chen, Reoma Matsuo, Ryota Shioya, Kuniyasu Suzaki |
| 2024 | ISLPED | ReOVE: Restricted Out-of-Order Execution for Superscalar Processors with Vector Extension. | Masayuki Kimura, Ryota Shioya |
| 2024 | PRDC | Dynamic Controllability Analysis for Preventing Injection Attacks. | Eri Ogawa, Tetsuro Yamazaki, Ryota Shioya |
| 2023 | ASPDAC | CNFET7: An Open Source Cell Library for 7-nm CNFET Technology. | Chenlin Shi, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, Hiroki Honda |
| 2023 | CC | A Sound and Complete Algorithm for Code Generation in Distance-Based ISA. | Shu Sugita, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai |
| 2023 | DATE | Out-of-Step Pipeline for Gather/Scatter Instructions. | Yi Ge, Katsuhiro Yoda, Makiko Ito, Toshiyuki Ichiba, Takahide Yoshikawa, Ryota Shioya, Masahiro Goshima |
| 2023 | DATE | TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA. | Reoma Matsuo, Toru Koizumi, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya |
| 2023 | ICCAD | SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs. | Yuichi Sugiyama, Reoma Matsuo, Ryota Shioya |
| 2023 | ISCAS | An Out-of-Order Superscalar Processor Using STRAIGHT Architecture in 28 nm CMOS. | Taichi Amano, Junichiro Kadomoto, Satoshi Mitsuno, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai |
| 2023 | MICRO | Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors. | Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai |
| 2022 | DATE | T-SKID: Predicting When to Prefetch Separately from Address Prediction. | Toru Koizumi, Tomoki Nakamura, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya |
| 2021 | ICCD | Compiling and Optimizing Real-world Programs for STRAIGHT ISA. | Toru Koizumi, Shu Sugita, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai |
| 2021 | ICCD | Accurate and Fast Performance Modeling of Processors with Decoupled Front-end. | Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai |
| 2020 | FPL | A High-Performance Out-of-Order Soft Processor Without Register Renaming. | Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai |
| 2018 | ICCD | Rearranging Random Issue Queue with High IPC and Short Delay. | Shinji Sakai, Taishi Suenaga, Ryota Shioya, Hideki Ando |
| 2018 | MICRO | STRAIGHT: Hazardless Processor Architecture Without Register Renaming. | Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai |
| 2014 | ICCD | Energy efficiency improvement of renamed trace cache through the reduction of dependent path length. | Ryota Shioya, Hideki Ando |
| 2014 | MICRO | A Front-End Execution Architecture for High Energy Efficiency. | Ryota Shioya, Masahiro Goshima, Hideki Ando |
| 2010 | MICRO | Register Cache System Not for Latency Reduction Purpose. | Ryota Shioya, Kazuo Horio, Masahiro Goshima, Shuichi Sakai |
| 2009 | PRDC | String-Wise Information Flow Tracking against Script Injection Attacks. | Kunbo Li, Ryota Shioya, Masahiro Goshima, Shuichi Sakai |
| 2009 | PRDC | Low-Overhead Architecture for Security Tag. | Ryota Shioya, Daewung Kim, Kazuo Horio, Masahiro Goshima, Shuichi Sakai |
| 2006 | PRDC | Base Address Recognition with Data Flow Tracking for Injection Attack Detection. | Satoshi Katsunuma, Hiroyuki Kurita, Ryota Shioya, Kazuto Shimizu, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai |