| 2025 | SAFECOMP | Uncovering Unsafe Feature Interactions in Vehicle Control Using Generative AI and Digital Twins. | Laure Millet, Justin Kernot, Arun Adiththan, S. Ramesh, Rami Debouk, Jeffrey Joyce |
| 2024 | SAFECOMP | Comprehensive Change Impact Analysis Applied to Advanced Automotive Systems. | Nicholas Annable, Mehrnoosh Askarpour, Thomas Chiang, Sahar Kokaly, Mark Lawford, Richard F. Paige, S. Ramesh, Alan Wassyng |
| 2023 | DATE | Autonomy-driven Emerging Directions in Software-defined Vehicles. | Unmesh D. Bordoloi, Samarjit Chakraborty, Markus Jochim, Prachi Joshi, Arvind Raghuraman, S. Ramesh |
| 2021 | MODELS | Applying Declarative Analysis to Software Product Line Models: An Industrial Study. | Ramy Shahin, Robert Hackman, Rafael F. Toledo, S. Ramesh, Joanne M. Atlee, Marsha Chechik |
| 2020 | SPLC | A conceptual model for unifying variability in space and time. | Sofia Ananieva, Sandra Greiner, Thomas Khn, Jacob Krger, Lukas Linsbauer, Sten Grner, Timo Kehrer, Heiko Klare, Anne Koziolek, Henrik Lnn, Sebastian Krieter, Christoph Seidl, S. Ramesh, Ralf Reussner, Bernhard Westfechtel |
| 2019 | ICST | Using Imprecise Test Oracles Modelled by FSM. | Omer Nguena Timo, Alexandre Petrenko, S. Ramesh |
| 2019 | SPLC | Towards a conceptual model for unifying variability in space and time. | Sofia Ananieva, Timo Kehrer, Heiko Klare, Anne Koziolek, Henrik Lnn, S. Ramesh, Andreas Burger, Gabriele Taentzer, Bernhard Westfechtel |
| 2018 | DATE | Cloud-assisted control of ground vehicles using adaptive computation offloading techniques. | Arun Adiththan, S. Ramesh, Soheil Samii |
| 2018 | ICTAC | Checking Sequence Generation for Symbolic Input/Output FSMs by Constraint Solving. | Omer Nguena-Timo, Alexandre Petrenko, S. Ramesh |
| 2017 | DAC | Specification, Verification and Design of Evolving Automotive Software: Invited. | S. Ramesh, Birgit Vogel-Heuser, Wanli Chang, Debayan Roy, Licong Zhang, Samarjit Chakraborty |
| 2016 | FORTE | Multiple Mutation Testing from FSM. | Alexandre Petrenko, Omer Nguena-Timo, S. Ramesh |
| 2016 | VLSID | Trustworthy Cyber Physical Systems. | Anuradha Annaswamy, Samarjit Chakraborty, Dip Goswami, S. Ramesh, Marilyn Wolf |
| 2016 | VLSID | Technologies for Safe and Intelligent Transportation Systems. | Samarjit Chakraborty, S. Ramesh |
| 2015 | DAC | Compositional modeling and analysis of automotive feature product lines. | Shankara Narayanan Krishna, Ganesh Khandu Narwane, S. Ramesh, Ashutosh Trivedi |
| 2015 | DAC | Model-based testing of automotive software: some challenges and solutions. | Alexandre Petrenko, Omer Nguena-Timo, S. Ramesh |
| 2015 | EMSOFT | A framework for mining hybrid automata from input/output traces. | Ramy Medhat, S. Ramesh, Borzoo Bonakdarpour, Sebastian Fischmeister |
| 2014 | DAC | Translation Validation for Stateflow to C. | Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh |
| 2014 | IRI | Reachability in hierarchical machines. | Omer Nguena-Timo, Alexandre Petrenko, Arnaud Dury, S. Ramesh |
| 2013 | DAC | Model-based development and verification of control software for electric vehicles. | Dip Goswami, Martin Lukasiewycz, Matthias Kauer, Sebastian Steinhorst, Alejandro Masrur, Samarjit Chakraborty, S. Ramesh |
| 2013 | ICST | A Method and Tool for Test Optimization for Automotive Controllers. | Alexandre Petrenko, Arnaud Dury, S. Ramesh, Swarup Mohalik |
| 2013 | IFM | Compositional Verification of Software Product Lines. | Jean-Vivien Millo, S. Ramesh, Shankara Narayanan Krishna, Ganesh Khandu Narwane |
| 2013 | MODELSWARD | Systematic Development of Control Designs via Formal Refinement. | Manoranjan Satpathy, Colin F. Snook, Silky Arora, S. Ramesh, Michael J. Butler |
| 2012 | APSEC | Relating Requirement and Design Variabilities. | Jean-Vivien Millo, S. Ramesh |
| 2012 | DATE | An integrated test generation tool for enhanced coverage of Simulink/Stateflow models. | Prakash Mohan Peranandam, Sachin Raviram, Manoranjan Satpathy, Anand Yeolekar, Ambar A. Gadkari, S. Ramesh |
| 2012 | DATE | Verifying timing synchronization constraints in distributed embedded architectures. | A. C. Rajeev, Swarup Mohalik, S. Ramesh |
| 2012 | ICTAC | SmartTestGen+: A Test Suite Booster for Enhanced Structural Coverage. | Sachin Raviram, Prakash Mohan Peranandam, Manoranjan Satpathy, S. Ramesh |
| 2012 | RE | Resolving uncertainty in automotive feature interactions. | Silky Arora, Prahladavaradan Sampath, S. Ramesh |
| 2012 | SPLC | Tracing SPLs precisely and efficiently. | Swarup Mohalik, S. Ramesh, Jean-Vivien Millo, Shankara Narayanan Krishna, Ganesh Khandu Narwane |
| 2011 | DAC | Rigorous model-based design & verification flow for in-vehicle software. | S. Ramesh, Ambar A. Gadkari |
| 2011 | DATE | When to stop verification?: Statistical trade-off between expected loss and simulation cost. | Sumit Kumar Jha, Christopher James Langmead, Swarup Mohalik, S. Ramesh |
| 2011 | EMSOFT | Cross-layer analysis, testing and verification of automotive control software. | Manfred Broy, Samarjit Chakraborty, Dip Goswami, S. Ramesh, Manoranjan Satpathy, Stefan Resmerita, Wolfgang Pree |
| 2011 | RE | Evolving specifications formally. | Prahladavaradan Sampath, Silky Arora, S. Ramesh |
| 2010 | DATE | Taming the component timing: A CBD methodology for real-time embedded systems. | Manoj G. Dixit, Pallab Dasgupta, S. Ramesh |
| 2010 | EMSOFT | Model-based analysis, synthesis and testing of automotive hardware/software architectures. | Samarjit Chakraborty, S. Ramesh, Jrgen Teich |
| 2010 | EMSOFT | Schedulability and end-to-end latency in distributed ECU networks: formal modeling and precise estimation. | A. C. Rajeev, Swarup Mohalik, Manoj G. Dixit, Devesh B. Chokshi, S. Ramesh |
| 2009 | CAV | Generating and Analyzing Symbolic Traces of Simulink/Stateflow Models. | Aditya Kanade, Rajeev Alur, Franjo Ivancic, S. Ramesh, Sriram Sankaranarayanan, K. C. Shashidhar |
| 2008 | ATVA | A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. | Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan |
| 2008 | CAV | AutoMOTGen: Automatic Model Oriented Test Generator for Embedded Control Systems. | Ambar A. Gadkari, Anand Yeolekar, J. Suresh, S. Ramesh, Swarup Mohalik, K. C. Shashidhar |
| 2008 | DAC | Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts. | Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang |
| 2008 | DATE | A Formal Approach To The Protocol Converter Problem. | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran |
| 2008 | EMSOFT | Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. | Rajeev Alur, Aditya Kanade, S. Ramesh, K. C. Shashidhar |
| 2008 | EMSOFT | Randomized directed testing (REDIRECT) for Simulink/Stateflow models. | Manoranjan Satpathy, Anand Yeolekar, S. Ramesh |
| 2008 | VLSID | Programming and Performance Modelling of Automotive ECU Networks. | Samarjit Chakraborty, S. Ramesh |
| 2008 | SEFM | Behaviour Directed Testing of Auto-code Generators. | Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar |
| 2007 | DAC | Performance Analysis of FlexRay-based ECU Networks. | Andrei Hagiescu, Unmesh D. Bordoloi, Samarjit Chakraborty, Prahladavaradan Sampath, P. Vignesh V. Ganesan, S. Ramesh |
| 2007 | EMSOFT | Existential abstractions for distributed reactive systems via syntactic transformations. | Vijay D'Silva, Sampada Sonalkar, S. Ramesh |
| 2007 | ICIW | A Test Bed for Web Services Protocols. | Pemadeep Ramsokul, Arcot Sowmya, S. Ramesh |
| 2007 | ICNP | Best Effort Session-Level Congestion Control. | S. Ramesh, Sneha Kumar Kasera |
| 2007 | RTAS | Testing Model-Processing Tools for Embedded Systems. | Prahladavaradan Sampath, A. C. Rajeev, S. Ramesh, K. C. Shashidhar |
| 2007 | SAFECOMP | Detection of Runtime Errors in MISRA C Programs: A Deductive Approach. | Ajith K. John, Babita Sharma, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh |
| 2007 | SEFM | How to Test Program Generators? A Case Study using flex. | Prahladavaradan Sampath, A. C. Rajeev, K. C. Shashidhar, S. Ramesh |
| 2007 | TAP | Automatic Testing from Formal Specifications. | Manoranjan Satpathy, Michael J. Butler, Michael Leuschel, S. Ramesh |
| 2005 | DATE | Automated Synthesis of Assertion Monitors using Visual Specifications. | Ambar A. Gadkari, S. Ramesh |
| 2004 | CAV | A Toolset for Modelling and Verification of GALS Systems. | S. Ramesh, Sampada Sonalkar, Vijay D'Silva, Naveen Chandra, B. Vijayalakshmi |
| 2004 | DATE | Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures. | Vijay D'Silva, S. Ramesh, Arcot Sowmya |
| 2004 | ISSTA | Slicing tools for synchronous reactive programs. | S. Ramesh, Aditya Rajeev Kulkarni, Viraj Kamat |
| 2004 | VLSID | Bridge Over Troubled Wrappers: Automated Interface Synthesis. | Vijay D'Silva, S. Ramesh, Arcot Sowmya |
| 2003 | SAC | Pointer Analysis of Multithreaded Java Programs. | Mangala Gowri Nanda, S. Ramesh |
| 2003 | SAFECOMP | Visual Modeling and Verification of Distributed Reactive Systems. | Asif Iqbal, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh |
| 2003 | SCAM | Static Slicing of Reactive Programs. | Aditya Rajeev Kulkarni, S. Ramesh |
| 2002 | ICCD | k-time Forced Simulation: A Formal Verification Technique for IP Reuse. | Partha S. Roop, Arcot Sowmya, S. Ramesh |
| 2002 | VLSID | Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract). | Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan |
| 2002 | SAFECOMP | Assertion Checking Environment (ACE) for Formal Verification of C Programs. | Babita Sharma, S. D. Dhodapkar, S. Ramesh |
| 2001 | ASPDAC | A formal approach to component based development of synchronous programs. | Partha S. Roop, Arcot Sowmya, S. Ramesh |
| 2000 | ISSTA | Slicing concurrent programs. | Mangala Gowri Nanda, S. Ramesh |
| 2000 | VLSID | Automatic Component Matching Using Forced Simulation. | Partha S. Roop, Arcot Sowmya, S. Ramesh |
| 1999 | CAV | Validation of Pipelined Processor Designs Using Esterel Tools: A Case Study. | S. Ramesh, Purandar Bhaduri |
| 1999 | VLSID | Efficient Translation of Statecharts to Hardware Circuits. | S. Ramesh |
| 1998 | HiPC | Apportioning: a technique for efficient reachability analysis of concurrent object-oriented programs. | Sridhar Iyer, S. Ramesh |
| 1997 | APSEC | A Tool-Suite for Reachability Analysis of Concurrent Object-Oriented Programs. | Sridhar Iyer, S. Ramesh |
| 1997 | ICLP | Concurrent Logic Programming and pi Calculus. | Sameer Mahajan, S. Ramesh |
| 1997 | ICPADS | Distributed Shared Memory on IBM SP2. | S. Ramesh, R. Lakshmi, R. Govindarajan |
| 1993 | POPL | Communicating Reactive Processes. | Grard Berry, S. Ramesh, R. K. Shyamasundar |
| 1992 | MFCS | Fully Abstract Semantics for Higher Order Communicating Systems. | S. Ramesh |
| 1987 | ICDCS | A New Efficient Implementation of CSP with Output Guards. | S. Ramesh |