| 1995 | ASPDAC | Optimization methods for lookup-table-based FPGAs using transduction method. | Shigeru Yamashita, Yahiko Kambayashi, Saburo Muroga |
| 1993 | VLSID | A Shared Memory Parallel Algorithm for Logic Synthesis. | Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga |
| 1991 | DAC | A Resynthesis Approach for Network Optimization. | Kuang-Chien Chen, Yusuke Matsunaga, Saburo Muroga, Masahiro Fujita |
| 1991 | DAC | Logic Optimization of MOS Networks. | Johnson Chan Limqueco, Saburo Muroga |
| 1990 | DAC | Timing Optimization for Multi-Level Combinational Networks. | Kuang-Chien Chen, Saburo Muroga |
| 1990 | ICCD | SYLON-REDUCE: an MOS network optimization algorithms using permissible functions. | Johnson Chan Limqueco, Saburo Muroga |
| 1989 | ICCAD | SYLON-DREAM: a multi-level network synthesizer. | Kuang-Chien Chen, Saburo Muroga |
| 1988 | ICCAD | Input assignment algorithm for decoded-PLAs with multi-input decoders. | Kuang-Chien Chen, Saburo Muroga |
| 1962 | FOCS | Generation of self-dual threshold functions and lower bounds of the number of threshold functions and a maximum weight | Saburo Muroga |
| 1961 | FOCS | Two problems on threshold functions | Calvin C. Elgot, Saburo Muroga |
| 1961 | FOCS | Functional forms of majority functions and a necessary and sufficient condition for their realizability | Saburo Muroga |