Sai Rahul Chalamalasetti
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
13
Venues
10
Active years
2009–2024
Best venue rank
A*
Where they publish
Papers
13 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | CCGRID | Opportunistic Energy-Aware Scheduling for Container Orchestration Platforms Using Graph Neural Networks. | Philipp Raith, Gourav Rattihalli, Aditya Dhakal, Sai Rahul Chalamalasetti, Dejan S. Milojicic, Eitan Frachtenberg, Stefan Nastic, Schahram Dustdar |
| 2024 | SC | Acceleration of Graph Neural Networks with Heterogenous Accelerators Architecture. | Kaiwen Cao, Archit Gajjar, Liad Gerstman, Kun Wu, Sai Rahul Chalamalasetti, Aditya Dhakal, Giacomo Pedretti, Pavana Prakash, Wen-Mei Hwu, Deming Chen, Dejan S. Milojicic |
| 2023 | Middleware | Kernel-as-a-Service: A Serverless Programming Model for Heterogeneous Hardware Accelerators. | Tobias Pfandzelter, Aditya Dhakal, Eitan Frachtenberg, Sai Rahul Chalamalasetti, Darel Emmot, Ninad Hogade, Rolando Pablo Hong Enriquez, Gourav Rattihalli, David Bermbach, Dejan S. Milojicic |
| 2021 | ASPDAC | Mixed Precision Quantization for ReRAM-based DNN Inference Accelerators. | Sitao Huang, Aayush Ankit, Plnio Silveira, Rodrigo Antunes, Sai Rahul Chalamalasetti, Izzat El Hajj, Dong Eun Kim, Glaucimar Aguiar, Pedro Bruel, Sergey Serebryakov, Cong Xu, Can Li, Paolo Faraboschi, John Paul Strachan, Deming Chen, Kaushik Roy, Wen-Mei W. Hwu, Dejan S. Milojicic |
| 2021 | COMPSAC | Resource Sharing and Security Implications on Machine Learning Inference Accelerators. | Plnio Silveira, Csar Augusto Fonticielha De Rose, Avelino Francisco Zorzo, Miguel Gomes Xavier, Dejan S. Milojicic, Sai Rahul Chalamalasetti, Sergey Serebryakov |
| 2021 | SC | A Python-based High-Level Programming Flow for CPU-FPGA Heterogeneous Systems : (Invited Paper). | Sitao Huang, Kun Wu, Sai Rahul Chalamalasetti, Izzat El Hajj, Cong Xu, Paolo Faraboschi, Deming Chen |
| 2019 | ASPLOS | PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference. | Aayush Ankit, Izzat El Hajj, Sai Rahul Chalamalasetti, Geoffrey Ndu, Martin Foltin, R. Stanley Williams, Paolo Faraboschi, Wen-mei W. Hwu, John Paul Strachan, Kaushik Roy, Dejan S. Milojicic |
| 2015 | FPGA | High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only). | Nasibeh Nasiri, Oren Segal, Martin Margala, Wim Vanderbauwhede, Sai Rahul Chalamalasetti |
| 2014 | FPL | High level programming framework for FPGAs in the data center. | Oren Segal, Martin Margala, Sai Rahul Chalamalasetti, Mitch Wright |
| 2013 | CIKM | High throughput filtering using FPGA-acceleration. | Wim Vanderbauwhede, Anton Frolov, Leif Azzopardi, Sai Rahul Chalamalasetti, Martin Margala |
| 2013 | FPGA | An FPGA memcached appliance. | Sai Rahul Chalamalasetti, Kevin T. Lim, Mitch Wright, Alvin AuYoung, Parthasarathy Ranganathan, Martin Margala |
| 2012 | ISPASS | Evaluating FPGA-acceleration for real-time unstructured search. | Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede, Mitch Wright, Parthasarathy Ranganathan |
| 2009 | FPL | A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model. | Sai Rahul Chalamalasetti, Wim Vanderbauwhede, Sohan Purohit, Martin Margala |