Sambuddha Bhattacharya
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
15
Venues
7
Active years
2003–2025
Best venue rank
A*
Where they publish
Papers
15 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ICASSP | AMuSE: Attentive Multilingual Speech Encoding for Zero-Prior ASR. | Ashutosh Varshney, Debmalya Chakrabarty, Akshat Jaiswal, Harish Arsikere, Abhinav Jain, Swayambhu Nath Ray, Frederick Weber, Anand Mohan, Prantik Sen, Garima Lalwani, Sambuddha Bhattacharya, Sri Garimella |
| 2025 | Interspeech | DuRep: Dual-Mode Speech Representation Learning via ASR-Aware Distillation. | Prabash Reddy Male, Swayambhu Nath Ray, Harish Arsikere, Akshat Jaiswal, Prakhar Swarup, Prantik Sen, Debmalya Chakrabarty, K. V. Vijay Girish, Nikhil Bhave, Frederick Weber, Sambuddha Bhattacharya, Sri Garimella |
| 2015 | VLSID | 2SAT Based Infeasibility Resolution during Design Rule Correction on Layouts with Multiple Grids. | Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala |
| 2014 | ASPDAC | Fixing Double Patterning violations with look-ahead. | Sambuddha Bhattacharya, Subramanian Rajagopalan, Shabbir H. Batterywala |
| 2013 | DAC | Automatic design rule correction in presence of multiple grids and track patterns. | Nitin Salodkar, Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala |
| 2009 | VLSID | Efficient Analog/RF Layout Closure with Compaction Based Legalization. | Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala |
| 2006 | ICCAD | Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts. | Nuttorn Jangkrajarng, Lihong Zhang, Sambuddha Bhattacharya, Nathan Kohagen, Chuanjin Richard Shi |
| 2005 | DAC | Template-driven parasitic-aware optimization of analog integrated circuit layouts. | Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Chuanjin Richard Shi |
| 2005 | VLSID | Automatic Device Layout Generation for Analog Layout Retargeting. | Roy Hartono, Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Chuanjin Richard Shi |
| 2004 | ASPDAC | Hierarchical extraction and verification of symmetry constraints for analog layout automation. | Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, Chuanjin Richard Shi |
| 2004 | ASPDAC | Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting. | Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, Chuanjin Richard Shi |
| 2004 | ASPDAC | CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects. | Zhao Li, Ravikanth Suravarapu, Roy Hartono, Sambuddha Bhattacharya, Kartikeya Mayaram, Chuanjin Richard Shi |
| 2004 | DAC | Correct-by-construction layout-centric retargeting of large analog designs. | Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, Chuanjin Richard Shi |
| 2003 | ISCAS | Concurrent logic and interconnect delay estimation of MOS circuits by mixed algebraic and Boolean symbolic analysis. | Sambuddha Bhattacharya, Chuanjin Richard Shi |
| 2003 | ISCAS | Automatic analog layout retargeting for new processes and device sizes. | Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, Chuanjin Richard Shi |