Samiran Dam
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2012–2016
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | VLSID | A Stacked VCO Architecture for Generating Multi-level Synchronous Control Signals. | Samiran Dam, Pradip Mandal |
| 2012 | VLSID | Iterative Performance Model Upgradation in Geometric Programming Based Analog Circuit Sizing for Improved Design Accuracy. | Samiran Dam, Pradip Mandal |