Samuel Bayliss
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
11
Venues
5
Active years
2012–2025
Best venue rank
A*
Where they publish
Papers
11 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | FCCM | Efficiency, Expressivity, and Extensibility in a Close-to-Metal NPU Programming Interface. | Erika Hunhoff, Joseph Melber, Kristof Denolf, Andra Bisca, Samuel Bayliss, Stephen Neuendorffer, Jeff Fifield, Jack Lo, Pranathi Vasireddy, Phil James-Roxby, Eric Keller |
| 2017 | ACSSC | Run fast when you can: Loop pipelining with uncertain and non-uniform memory dependencies. | Junyi Liu, John Wickerson, Samuel Bayliss, George A. Constantinides |
| 2016 | FPL | Survey of domain-specific languages for FPGA computing. | Nachiket Kapre, Samuel Bayliss |
| 2015 | FCCM | Offline Synthesis of Online Dependence Testing: Parametric Loop Pipelining for HLS. | Junyi Liu, Samuel Bayliss, George A. Constantinides |
| 2015 | FPGA | MATCHUP: Memory Abstractions for Heap Manipulating Programs. | Felix Winterstein, Kermin Fleming, Hsin-Jung Yang, Samuel Bayliss, George A. Constantinides |
| 2014 | DAC | Datapath Synthesis for Overclocking: Online Arithmetic for Latency-Accuracy Trade-offs. | Kan Shi, David Boland, Edward A. Stott, Samuel Bayliss, George A. Constantinides |
| 2014 | FCCM | Compiling Higher Order Functional Programs to Composable Digital Hardware. | Eduardo Aguilar-Pelaez, Samuel Bayliss, Alex I. Smith, Felix Winterstein, Dan R. Ghica, David B. Thomas, George A. Constantinides |
| 2014 | FCCM | Separation Logic-Assisted Code Transformations for Efficient High-Level Synthesis. | Felix Winterstein, Samuel Bayliss, George A. Constantinides |
| 2014 | FPL | Area implications of memory partitioning for high-level synthesis on FPGAs. | Luca Gallo, Alessandro Cilardo, David B. Thomas, Samuel Bayliss, George A. Constantinides |
| 2013 | FPL | FPGA-based K-means clustering using tree-based data structures. | Felix Winterstein, Samuel Bayliss, George A. Constantinides |
| 2012 | FPGA | Optimizing SDRAM bandwidth for custom FPGA loop accelerators. | Samuel Bayliss, George A. Constantinides |