| 2026 | VLSID | A 8-16 Gb/s/pin Full-Duplex Voltage-Mode Transmitter with Pulse Width Modulation Based Equalization and Analog Echo Canceller. | Saurabh Saxena, Vinod Ganesan, Shubham Choudhary |
| 2026 | VLSID | A 2.95 pJ/b 42Gb/s PAM-8 Clock and Data Recovery. | Saurabh Saxena, Neel Hingrajiya, Suryadipto Mukherjee, Vivek Pala |
| 2025 | AAAI | High-Resolution Frame Interpolation with Patch-based Cascaded Diffusion. | Junhwa Hur, Charles Herrmann, Saurabh Saxena, Janne Kontkanen, Wei-Sheng Lai, Yichang Shih, Michael Rubinstein, David J. Fleet, Deqing Sun |
| 2025 | ICCV | RoMo: Robust Motion Segmentation Improves Structure from Motion. | Lily Goli, Sara Sabour, Mark J. Matthews, Marcus A. Brubaker, Dmitry Lagun, Alec Jacobson, David J. Fleet, Saurabh Saxena, Andrea Tagliasacchi |
| 2025 | ICLR | Controlling Space and Time with Diffusion Models. | Daniel Watson, Saurabh Saxena, Lala Li, Andrea Tagliasacchi, David J. Fleet |
| 2024 | CVPR | NeRFiller: Completing Scenes via Generative 3D Inpainting. | Ethan Weber, Aleksander Holynski, Varun Jampani, Saurabh Saxena, Noah Snavely, Abhishek Kar, Angjoo Kanazawa |
| 2023 | ICCV | A Generalist Framework for Panoptic Segmentation of Images and Videos. | Ting Chen, Lala Li, Saurabh Saxena, Geoffrey E. Hinton, David J. Fleet |
| 2023 | VLSID | A 2.25 GHz PLL with 0.05-2 MHz Inloop Phase Modulation and -70 dBc Reference Spur for Telemetry Applications. | Snigdha Jakkoju, Deepthi J. Bandarupalli, Anil Srikanth, Saji Thomas, Saurabh Saxena |
| 2023 | VLSID | A 105-525MHz Integer-N Phase-Locked Loop in Indigenous SCL 180nm CMOS. | Shivam Nigam, Mukund Murali, Hari Shanker Gupta, Saurabh Saxena |
| 2022 | ICLR | Pix2seq: A Language Modeling Framework for Object Detection. | Ting Chen, Saurabh Saxena, Lala Li, David J. Fleet, Geoffrey E. Hinton |
| 2022 | ISCAS | A Class-C Injection-Locked Tripler with 48 dB Sub-Harmonic Suppression and 15 fs Additive RMS Jitter in 0.13μm BiCMOS Process. | Sonam Sadhukhan, Pranav Kumar, Arpan Thakkar, Apoorva Bhatia, Saurabh Saxena |
| 2022 | VLSID | A 5-Gb/s PAM4 Voltage Mode Transmitter with Current Mode Continuous Time Linear Equalizer. | Shraman Mukherjee, Sumantra Seth, Saurabh Saxena |
| 2020 | EMNLP | Non-Autoregressive Machine Translation with Latent Alignments. | Chitwan Saharia, William Chan, Saurabh Saxena, Mohammad Norouzi |
| 2020 | ISCAS | A 2.5-5GHz Injection-Locked Clock Multiplier with Embedded Phase Interpolator in 65nm CMOS. | R. Gautam, Jaya Deepthi Bandarupalli, Saurabh Saxena |
| 2018 | ISCAS | Area and Current Efficient Capacitor-Less Low Drop-Out Regulator Using Time-Based Error Amplifier. | Qadeer A. Khan, Saurabh Saxena, Abirmoya Santra |
| 2017 | ICML | Large-Scale Evolution of Image Classifiers. | Esteban Real, Sherry Moore, Andrew Selle, Saurabh Saxena, Yutaka I. Leon-Suematsu, Jie Tan, Quoc V. Le, Alexey Kurakin |
| 2009 | ISCAS | Automatic Tuning of Time Constants in Single Bit Continuous-time Delta-sigma Modulators. | Saurabh Saxena, Prabu Sankar, Shanthi Pavan |