Serge Vernalde
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
26
Venues
8
Active years
1996–2004
Best venue rank
A*
Where they publish
Papers
26 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | DAC | Operating-system controlled network on chip. | Vincent Nollet, Thodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde |
| 2004 | DATE | Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. | Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins |
| 2004 | FPL | Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation. | T. Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Thodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frdric Robert |
| 2003 | DATE | Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. | Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins |
| 2003 | DATE | Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. | Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins |
| 2003 | FCCM | Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. | Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor |
| 2003 | FPL | Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. | Thodore Marescaux, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins |
| 2003 | FPL | ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. | Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins |
| 2003 | FPL | Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. | Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor |
| 2003 | SCOPES | Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. | Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor |
| 2002 | DATE | Techniques to Evolve a C++ Based System Design Language. | Robert Pasko, Serge Vernalde, Patrick Schaumont |
| 2002 | FPL | Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. | Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man |
| 2002 | FPL | Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs. | Thodore Marescaux, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins |
| 2001 | ASPDAC | Virtual Java/FPGA interface for networked reconfiguration. | Yajun Ha, Geert Vanmeerbeeck, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man |
| 2001 | FCCM | A SW/HW Interface API for Java/FPGA Co-Designed Applets. | Yajun Ha, Patrick Schaumont, Serge Vernalde, Marc Engels, Rudy Lauwereins, Hugo De Man |
| 2001 | FPL | Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware. | Yajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, Hugo De Man |
| 2000 | PDPTA | Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects. | Yajun Ha, Serge Vernalde, Patrick Schaumont, Marc Engels, Hugo De Man |
| 2000 | RSP | A Hardware Virtual Machine for the Networked Reconfiguration. | Yajun Ha, Patrick Schaumont, Marc Engels, Serge Vernalde, Freddy Potargent, Luc Rijnders, Hugo De Man |
| 1999 | DAC | A 10 Mbit/s Upstream Cable Modem with Automatic equalization. | Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels |
| 1999 | DAC | Hardware Reuse at the Behavioral Level. | Patrick Schaumont, Radim Cmar, Serge Vernalde, Marc Engels, Ivo Bolsens |
| 1999 | DATE | A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement. | Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge Vernalde, Ivo Bolsens |
| 1998 | DAC | A Programming Environment for the Design of Complex High Speed ASICs. | Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens |
| 1998 | RSP | A Technique for Combined Virtual Prototyping and Hardware Design. | Patrick Schaumont, Geert Vanmeerbeeck, E. Watzeels, Serge Vernalde, Marc Engels, Ivo Bolsens |
| 1997 | DATE | Highly scalable parallel parametrizable architecture of the motion estimator. | Radim Cmar, Serge Vernalde |
| 1997 | DATE | Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications. | Patrick Schaumont, Serge Vernalde, Luc Rijnders, Marc Engels, Ivo Bolsens |
| 1996 | DAC | Combined Control Flow Dominated and Data Flow Dominated High-Level Synthesis. | Elisabeth Berrebi, Polen Kission, Serge Vernalde, S. De Troch, Jean-Claude Herluison, Jean Frhel, Ahmed Amine Jerraya, Ivo Bolsens |