| 2014 | PDCAT | Sparse Matrix-Vector Multiplication: A Data Mapping-Based Architecture. | Ahmad Mansour, Jrgen Gtze, Wei-Chun Hsu, Shanq-Jang Ruan |
| 2013 | ICIP | Histogram shrinking for power-saving contrast enhancement. | Yan-Tsung Peng, Fan-Chieh Cheng, Li-Ming Jan, Shanq-Jang Ruan |
| 2012 | ISCAS | Constant time O(1) contextual and variational contrast enhancement with integral histogram. | Yu-Wen Tsai, Fan-Chieh Cheng, Shanq-Jang Ruan |
| 2010 | SAC | Advanced motion detection for intelligent video surveillance systems. | Fan-Chieh Cheng, Shih-Chia Huang, Shanq-Jang Ruan |
| 2008 | ASPDAC | Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block selection algorithm. | Jui-Yuan Hsieh, Shanq-Jang Ruan |
| 2008 | SMC | An efficient thresholding algorithm for degraded document images based on intelligent block detection. | Yi-Fan Chang, Yu-Ting Pai, Shanq-Jang Ruan |
| 2007 | DATE | Improve CAM power efficiency using decoupled match line scheme. | Yen-Jen Chang, Yuan-Hong Liao, Shanq-Jang Ruan |
| 2006 | CIT | DS2IS: Dictionary-based Segmented Signal Inversion Scheme for Low Power Dynamic Bus Design. | Shang-Fang Tsai, Shanq-Jang Ruan |
| 2006 | ISCAS | Low power scheduling method using multiple supply voltages. | Kun-Lin Tsai, Ju-Yueh Lee, Shanq-Jang Ruan, Feipei Lai |
| 2005 | ISCAS | An efficient algorithm for simultaneous wire permutation, inversion, and spacing. | Shanq-Jang Ruan, Edwin Naroska, Uwe Schwiegelshohn |
| 2005 | ISCAS | A low power scheduling method using dual V | Kun-Lin Tsai, Szu-Wei Chaung, Feipei Lai, Shanq-Jang Ruan |
| 2005 | KES | Energy-Efficient Watermark Algorithm Based on Pairing Mechanism. | Yu-Ting Pai, Shanq-Jang Ruan, Jrgen Gtze |
| 2003 | ASPDAC | A novel approach for digital waveform compression. | Edwin Naroska, Shanq-Jang Ruan, Chia-Lin Ho, Said Mchaalia, Feipei Lai, Uwe Schwiegelshohn |
| 2003 | ISCAS | On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms. | Edwin Naroska, Shanq-Jang Ruan, Feipei Lai, Uwe Schwiegelshohn, Le-Chin Liu |
| 2002 | ICCD | Cache Design for Eliminating the Address Translation Bottleneck and Reducing the Tag Area Cost. | Yen-Jen Chang, Feipei Lai, Shanq-Jang Ruan |
| 2002 | ICCD | Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. | Shanq-Jang Ruan, Edwin Naroska, Chia-Lin Ho, Feipei Lai |
| 2001 | ISCAS | An entropy-based algorithm to reduce area overhead for bipartition-codec architecture. | Po-Hung Chen, Shanq-Jang Ruan, Kuen-Pin Wu, Dai-Xun Hu, Feipei Lai, Kun-Lin Tsai |
| 2001 | ISCAS | Synthesis of partition-codec architecture for low power and small area circuit design. | Shanq-Jang Ruan, Jen-Chiun Lin, Po-Hung Chen, Kun-Lin Tsai, Feipei Lai |
| 2000 | LCN | On Key Distribution in Secure Multicasting. | Kuen-Pin Wu, Shanq-Jang Ruan, Feipei Lai, Chih-Kuang Tseng |
| 1999 | ICCAD | A bipartition-codec architecture to reduce power in pipelined circuits. | Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-Jong Chen, Xian-Jun Huang |