Shrutisagar Chandrasekaran
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2005–2007
Best venue rank
B
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ISCAS | Novel Sparse OBC based Distributed Arithmetic Architecture for Matrix Transforms. | Shrutisagar Chandrasekaran, Abbes Amira |
| 2006 | FPL | FPGA Implementation and Power Modelling of the Fast Walsh Transform. | Shrutisagar Chandrasekaran, Abbes Amira |
| 2006 | FPL | Power Reduction for FPGA Implementations : Design Optimisation and High Level Modelling. | Shrutisagar Chandrasekaran, Abbes Amira |
| 2005 | FPL | High Speed / Low Power Architectures for the Finite Radon Transform. | Shrutisagar Chandrasekaran, Abbes Amira |
| 2005 | ICIP | An area efficient low power inner product computation for discrete orthogonal transforms. | Shrutisagar Chandrasekaran, Abbes Amira |