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Shyh-Shyuan Sheu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

8

Venues

5

Active years

2011–2024

Best venue rank

A*

Where they publish

Papers

8 indexed papers, newest first.

YearVenueTitleAuthors
2024ISCASCIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device.Yan-Cheng Guo, Tian-Sheuan Chang, Chih-Sheng Lin, Bo-Cheng Chiou, Chih-Ming Lai, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang
2019DACNV-BNN: An Accurate Deep Convolutional Neural Network Based on Binary STT-MRAM for Adaptive AI Edge.Chih-Cheng Chang, Ming-Hung Wu, Jia-Wei Lin, Chun-Hsien Li, Vivek Parmar, Heng-Yuan Lee, Jeng-Hua Wei, Shyh-Shyuan Sheu, Manan Suri, Tian-Sheuan Chang, Tuo-Hung Hou
2017ISLPEDWrite-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches.Tsai-Kan Chien, Lih-Yih Chiou, Yi-Sung Tsou, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu
2016ISCASDesigns of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell.Meng-Fan Chang, Ching-Hao Chuang, Yen-Ning Chiang, Shyh-Shyuan Sheu, Chia-Chen Kuo, Hsiang-Yun Cheng, John Sampson, Mary Jane Irwin
2016ISCASA low store energy and robust ReRAM-based flip-flop for normally off microprocessors.Tsai-Kan Chien, Lih-Yih Chiou, Yao-Chun Chuang, Shyh-Shyuan Sheu, Heng-Yuan Li, Pei-Hua Wang, Tzu-Kun Ku, Ming-Jinn Tsai, Chih-I Wu
2012ASPDACEndurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device.Meng-Fan Chang, Ching-Hao Chuang, Min-Ping Chen, Lai-Fu Chen, Hiroyuki Yamauchi, Pi-Feng Chiu, Shyh-Shyuan Sheu
2011ASPDACCircuit design challenges in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC.Meng-Fan Chang, Pi-Feng Chiu, Shyh-Shyuan Sheu
2011VTSTraining-based forming process for RRAM yield improvement.Hsiu-Chuan Shih, Ching-Yi Chen, Cheng-Wen Wu, Chih-He Lin, Shyh-Shyuan Sheu