Siddika Berna rs
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2003–2011
Best venue rank
A
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | DSD | Architectures for Fast Modular Multiplication. | Ahmet Aris, Siddika Berna rs, Gkay Saldamli |
| 2008 | ISCAS | Differential Power Analysis resistant hardware implementation of the RSA cryptosystem. | Keklik Alptekin Bayam, Siddika Berna rs |
| 2004 | CHES | Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure? | Franois-Xavier Standaert, Siddika Berna rs, Bart Preneel |
| 2004 | FPL | Power Analysis Attacks Against FPGA Implementations of the DES. | Franois-Xavier Standaert, Siddika Berna rs, Jean-Jacques Quisquater, Bart Preneel |
| 2003 | CHES | Power-Analysis Attacks on an FPGA - First Experimental Results. | Siddika Berna rs, Elisabeth Oswald, Bart Preneel |