Skip to content

Sitao Huang

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

32

Venues

18

Active years

2013–2026

Best venue rank

A*

Where they publish

Papers

32 indexed papers, newest first.

YearVenueTitleAuthors
2026AAAIHARK: Hierarchical Agentic Retrieval with Keyframing for Video Understanding (Student Abstract).Jingcheng Li, Ye Qiao, Sitao Huang
2026AAAIQ-ROAR: Outlier-Aware Rescaling for RoPE Position Interpolation in Quantized Long-Context LLMs (Student Abstract).Ye Qiao, Sitao Huang
2026AAAIAPEX-Q: Arbitrary-dimension Product-EXtension Quantization for Accelerated LLM Deployment (Student Abstract).Yian Wang, Ye Qiao, Sitao Huang, Hyoukjun Kwon
2026FPGATeLLMe: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs.Ye Qiao, Zhiheng Chen, Yifan Zhang, Yian Wang, Sitao Huang
2026ISPASSCharacterizing State Space Model and Hybrid Language Model Performance with Long Context.Saptarshi Mitra, Rachid Karami, Haocheng Xu, Sitao Huang, Hyoukjun Kwon
2025DACSSDTrain: An Activation Offloading Framework to SSDs for Faster Large Language Model Training.Kun Wu, Jeongmin Brian Park, Xiaofan Zhang, Mert Hidayetoglu, Vikram Sharma Mailthody, Sitao Huang, Steven S. Lumetta, Wen-Mei Hwu
2025ICCADCOBRA: Algorithm-Architecture Co-optimized Binary Transformer Accelerator for Edge Inference.Ye Qiao, Zhiheng Chen, Yian Wang, Yifan Zhang, Yunzhe Deng, Sitao Huang
2025IJCNNRSEND: Retinex-based Squeeze and Excitation Network with Dark Region Detection for Efficient Low Light Image Enhancement.Jingcheng Li, Ye Qiao, Haocheng Xu, Sitao Huang
2025IJCNNMONAS: Efficient Zero-Shot Neural Architecture Search for MCUs.Ye Qiao, Haocheng Xu, Yifan Zhang, Sitao Huang
2024ASPLOSHector: An Efficient Programming and Compilation Framework for Implementing Relational Graph Neural Networks in GPU Architectures.Kun Wu, Mert Hidayetoglu, Xiang Song, Sitao Huang, Da Zheng, Israt Nisa, Wen-Mei Hwu
2024DATEMicroNAS: Zero-Shot Neural Architecture Search for MCUs.Ye Qiao, Haocheng Xu, Yifan Zhang, Sitao Huang
2024FPGAAccelerating Autonomous Path Planning on FPGAs with Sparsity-Aware HW/SW Co-Optimizations.Xiaoyu Niu, Yanjun Zhang, Yifan Zhang, Hongzheng Tian, Bo Yu, Shaoshan Liu, Sitao Huang
2024ICCADA Sparsity-Aware Autonomous Path Planning Accelerator with Algorithm-Architecture Co-Design.Yanjun Zhang, Xiaoyu Niu, Yifan Zhang, Hongzheng Tian, Bo Yu, Shaoshan Liu, Sitao Huang
2023DACLate Breaking Results: Scalable and Efficient Hyperdimensional Computing for Network Intrusion Detection.Junyao Wang, Hanning Chen, Mariam Issa, Sitao Huang, Mohsen Imani
2023DACDistHD: A Learner-Aware Dynamic Encoding Method for Hyperdimensional Classification.Junyao Wang, Sitao Huang, Mohsen Imani
2023ISLPEDCARMA: Context-Aware Runtime Reconfiguration for Energy-Efficient Sensor Fusion.Yifan Zhang, Arnav Vaibhav Malawade, Xiaofang Zhang, Yuhui Li, DongHwan Seong, Mohammad Abdullah Al Faruque, Sitao Huang
2021ASPDACMixed Precision Quantization for ReRAM-based DNN Inference Accelerators.Sitao Huang, Aayush Ankit, Plnio Silveira, Rodrigo Antunes, Sai Rahul Chalamalasetti, Izzat El Hajj, Dong Eun Kim, Glaucimar Aguiar, Pedro Bruel, Sergey Serebryakov, Cong Xu, Can Li, Paolo Faraboschi, John Paul Strachan, Deming Chen, Kaushik Roy, Wen-Mei W. Hwu, Dejan S. Milojicic
2021ASPLOSMind mappings: enabling efficient algorithm-accelerator mapping space search.Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher
2021FCCMExtending HLS with High-Level Descriptive Language for Configurable Algorithm-Level Spatial Structure Design.Chengyue Wang, Sitao Huang, Wen-Mei Hwu, Deming Chen
2021FPGAPyLog: An Algorithm-Centric Python-Based FPGA Programming and Synthesis Flow.Sitao Huang, Kun Wu, Hyunmin Jeong, Chengyue Wang, Deming Chen, Wen-Mei Hwu
2021ICCDImproved GPU Implementations of the Pair-HMM Forward Algorithm for DNA Sequence Alignment.Enliang Li, Subho S. Banerjee, Sitao Huang, Ravishankar K. Iyer, Deming Chen
2021IDEALChimera: A Hybrid Machine Learning-Driven Multi-Objective Design Space Exploration Tool for FPGA High-Level Synthesis.Mang Yu, Sitao Huang, Deming Chen
2021SCA Python-based High-Level Programming Flow for CPU-FPGA Heterogeneous Systems : (Invited Paper).Sitao Huang, Kun Wu, Sai Rahul Chalamalasetti, Izzat El Hajj, Cong Xu, Paolo Faraboschi, Deming Chen
2019CGOAutomatic Generation of Warp-Level Primitives and Atomic Instructions for Fast and Portable Parallel Reduction on GPUs.Simon Garcia De Gonzalo, Sitao Huang, Juan Gmez-Luna, Simon D. Hammond, Onur Mutlu, Wen-Mei Hwu
2019DACFPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge.Cong Hao, Xiaofan Zhang, Yuhong Li, Sitao Huang, Jinjun Xiong, Kyle Rupnow, Wen-Mei Hwu, Deming Chen
2019FPLAnalysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device.Seungwon Min, Sitao Huang, Mohamed El-Hadedy, Jinjun Xiong, Deming Chen, Wen-Mei Hwu
2018ICLRTowards Neural Phrase-based Machine Translation.Po-Sen Huang, Chong Wang, Sitao Huang, Dengyong Zhou, Li Deng
2017FPGAHardware Acceleration of the Pair-HMM Algorithm for DNA Variant Calling.Sitao Huang, Gowthami Jayashri Manikandan, Anand Ramachandran, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen
2016FCCMAcceleration of the Pair-HMM Algorithm for DNA Variant Calling.Gowthami Jayashri Manikandan, Sitao Huang, Kyle Rupnow, Wen-mei W. Hwu, Deming Chen
2014FPGAAccelerating frequent item counting with FPGA.Yuliang Sun, Zilong Wang, Sitao Huang, Lanjun Wang, Yu Wang, Rong Luo, Huazhong Yang
2013FPGAAccelerating subsequence similarity search based on dynamic time warping distance with FPGA.Zilong Wang, Sitao Huang, Lanjun Wang, Hao Li, Yu Wang, Huazhong Yang
2013HPCCDTW-Based Subsequence Similarity Search on AMD Heterogeneous Computing Platform.Sitao Huang, Guohao Dai, Yuliang Sun, Zilong Wang, Yu Wang, Huazhong Yang