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Snorre Aunet

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

28

Venues

6

Active years

2001–2026

Best venue rank

C

Where they publish

Papers

28 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCASA Low-Power, Single-Comparator, Differential Level-Crossing ADC.Farnaz Salarkia, Tor Sverre Lande, Snorre Aunet, Dag T. Wisland
2013DDECSYield-oriented energy and performance model for subthreshold circuits with Vth variations.Hans Kristian Otnes Berge, Snorre Aunet
2013DDECSProton beam characterization at Oslo Cyclotron Laboratory for radiation testing of electronic devices.Amir Hasanbegovic, Snorre Aunet
2011DDECSMuller C-elements based on minority-3 functions for ultra low voltage supplies.Hans Kristian Otnes Berge, Amir Hasanbegovic, Snorre Aunet
2011ISCASMulti-objective optimization of minority-3 functions for ultra-low voltage supplies.Hans Kristian Otnes Berge, Snorre Aunet
2010DDECSMemory elements based on minority-3 gates and inverters implemented in 90 nm CMOS.Snorre Aunet, Amir Hasanbegovic
2009ISCASUltra Low Power Full Adder Topologies.Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Snorre Aunet, Tuan Vu Cao, Ali Peiravi
2008DDECSThree Subthreshold Flip-Flop Cells Characterized in 90 nm and 65 nm CMOS Technology.Hvard Pedersen Alstad, Snorre Aunet
2008DDECSImproving Circuit Security against Power Analysis Attacks with Subthreshold Operation.Hvard Pedersen Alstad, Snorre Aunet
2007IWANNStatistical Simulations for Exploring Defect Tolerance and Power Consumption for 4 Subthreshold 1-Bit Addition Circuits.Snorre Aunet, Hans Kristian Otnes Berge
2007VLSIDSmall Fan-in Floating-Gate Circuits with Application to an Improved Adder Structure.Jon Alfredsson, Snorre Aunet, Bengt Oelmann
2006AICCSAFemto Joule Switching for Nano Electronics.Valeriu Beiu, Jabulani Nyathi, Snorre Aunet, Mawahib H. Sulieman
2006DDECSSix Subthreshold Full Adder Cells Characterized in 90 nm CMOS Technology.Kristian Granhaug, Snorre Aunet
2006ISCASBody-bias regulator for ultra low power multifunction CMOS gates.Kristian Granhaug, Snorre Aunet, Tor Sverre Lande
2005IJCNNUltra low power fault tolerant neural inspired CMOS logic.Snorre Aunet, Valeriu Beiu
2005IJCNNLow-voltage pseudo floating-gate reconfigurable linear threshold elements.ivind Nss, Snorre Aunet, Yngvar Berg
2005IWANNUltra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures.Valeriu Beiu, Asbjrn Djupdal, Snorre Aunet
2005IWANNUsing Kolmogorov Inspired Gates for Low Power Nanoelectronics.Valeriu Beiu, Artur Zawadski, Razvan Andonie, Snorre Aunet
2004IJCNNReconfigurable subthreshold CMOS perceptron.Snorre Aunet, Bengt Oelmann, Suliman Abdalla, Yngvar Berg
2003ISCASNovel recharge semi-floating-gate CMOS logic for multiple-valued systems.Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Hvin
2003ISCASExploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers.Yngvar Berg, Snorre Aunet, ivind Nss, Johannes Goplen Lomsdalen, Mats Hvin
2003IWANNUV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3".Snorre Aunet, Yngvar Berg
2002ISCASA novel floating-gate multiple-valued CMOS full-adder.Yngvar Berg, Snorre Aunet, ivind Nss, O. Hagen, Mats Hvin
2002ISCASNovel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic.Yngvar Berg, ivind Nss, Snorre Aunet, Ren Jensen, Mats Hvin
2002ISCASCompact low-voltage self-calibrating digital floating-gate CMOS logic circuits.Trond Ytterdal, Snorre Aunet
2001ISCASExtreme low-voltage floating-gate CMOS transconductance amplifier.Yngvar Berg, Snorre Aunet, ivind Nss, Henning Gundersen, Mats Hvin
2001ISCASFloating-gate CMOS differential analog inverter for ultra low-voltage applications.Yngvar Berg, Snorre Aunet, ivind Nss, Mats Hvin
2001ISCASExploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion.Yngvar Berg, Snorre Aunet, ivind Nss, Mats Hvin