| 2026 | ISCAS | CHiP-NoC: A Congestion-Adaptive Dual-Mode Neuromorphic NoC with Hybrid Spike Compression. | Yipeng Gao, Yi Zhong, Yingying Cui, Song Jia, Yuan Wang |
| 2025 | ISCAS | CROSSCUT: A Multi-Core Neuromorphic Accelerator Improving Resource-Utilization. | Youming Yang, Yi Zhong, Zilin Wang, Tao Zhang, Li Lun, Yingying Cui, Xiaoxin Cui, Song Jia, Yuan Wang |
| 2025 | ISCAS | Enabling Fault Isolation in Fault Injection for Automotive-grade Circuits Simulation. | Yulong Liu, Junhao Lin, Yuheng Li, Pingsheng Zhang, Zenan Yan, Yuan Wang, Song Jia |
| 2017 | ISCAS | A reliable true random number generator based on novel chaotic ring oscillator. | Yunfan Yang, Song Jia, Yuan Wang, Shaonan Zhang, Chao Liu |
| 2016 | ISCAS | A novel low-power and high-speed dual-modulus prescaler based on extended true single-phase clock logic. | Song Jia, Ziyi Wang, Zijin Li, Yuan Wang |
| 2016 | ISCAS | A novel low-leakage power-rail ESD clamp circuit with adjustable triggering voltage and superior false-triggering immunity for nanoscale applications. | Guangyi Lu, Yuan Wang, Jian Cao, Song Jia, Xing Zhang |
| 2016 | ISCAS | Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics. | Yuan Wang, Yuequan Liu, Mengyin Jiang, Song Jia, Xing Zhang |
| 2015 | ISCAS | A low-power high-speed 32/33 prescaler based on novel divide-by-4/5 unit with improved true single-phase clock logic. | Song Jia, Shilin Yan, Yuan Wang, Ganggang Zhang |
| 2015 | ISCAS | 180.5Mbps-8Gbps DLL-based clock and data recovery circuit with low jitter performance. | Yuequan Liu, Yuan Wang, Song Jia, Xing Zhang |