Skip to content

Soontae Kim

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

34

Venues

13

Active years

2001–2025

Best venue rank

A*

Where they publish

Papers

34 indexed papers, newest first.

YearVenueTitleAuthors
2025DATEC2C: A Framework for Critical Token Classification in Transformer-Based Inference Systems.Myeongjae Jang, Jesung Kim, Haejin Nam, Sihyun Kim, Soontae Kim
2023MICROHARP: Hardware-Based Pseudo-Tiling for Sparse Matrix Multiplication Accelerator.Jinkwon Kim, Myeongjae Jang, Haejin Nam, Soontae Kim
2022DATEENCORE Compression: Exploiting Narrow-width Values for Quantized Deep Neural Networks.Myeongjae Jang, Jinkwon Kim, Jesung Kim, Soontae Kim
2022DATESalvaging Runtime Bad Blocks by Skipping Bad Pages for Improving SSD Performance.Junoh Moon, Mincheol Kang, Wonyoung Lee, Soontae Kim
2022HPCAExploiting Inter-block Entropy to Enhance the Compressibility of Blocks with Diverse Data.Jinkwon Kim, Mincheol Kang, Jeongkyu Hong, Soontae Kim
2020ICSLeveraging intra-page update diversity for mitigating write amplification in SSDs.Imran Fareed, Mincheol Kang, Wonyoung Lee, Soontae Kim
2017HPCAPartial Row Activation for Low-Power DRAM System.Yebin Lee, Hyeonggyu Kim, Seokin Hong, Soontae Kim
2016DATENetwork delay-aware energy management for mobile systems.Minho Ju, Hyeonggyu Kim, Soontae Kim
2016ISPASSMofySim: A mobile full-system simulation framework for energy consumption and performance analysis.Minho Ju, Hyeonggyu Kim, Soontae Kim
2014ICCDTernary cache: Three-valued MLC STT-RAM caches.Seokin Hong, Jongmin Lee, Soontae Kim
2013DATEAVICA: an access-time variation insensitive L1 cache architecture.Seokin Hong, Soontae Kim
2013HPCASkinflint DRAM system: Minimizing DRAM chip writes for low power.Yebin Lee, Soontae Kim, Seokin Hong, Jongmin Lee
2013HPCAMacho: A failure model-oriented adaptive cache architecture to enable near-threshold voltage scaling.Tayyeb Mahmood, Soontae Kim, Seokin Hong
2013ICCDPerformance-controllable shared cache architecture for multi-core soft real-time systems.Myoungjun Lee, Soontae Kim
2012ASPDACLow-cost control flow error protection by exploiting available redundancies in the pipeline.Mohammad Abdur Rouf, Soontae Kim
2012ICCDECC string: Flexible ECC management for low-cost error protection of L2 caches.Jeongkyu Hong, Soontae Kim
2012ISLPEDDRAM power-aware rank scheduling.Sukki Kim, Soontae Kim, Yebin Lee
2012ISLPEDAdopting TLB index-based tagging to data caches for tag energy reduction.Jongmin Lee, Soontae Kim
2011APSCCADSR: Angle-Based Multi-hop Routing Strategy for Mobile Wireless Sensor Networks.Kwangcheol Shin, Kyungjun Kim, Soontae Kim
2011CASESRealizing near-true voltage scaling in variation-sensitive l1 caches via fault buffers.Tayyeb Mahmood, Soontae Kim
2011EMSOFTDynamic scheduling algorithm and its schedulability analysis for certifiable dual-criticality systems.Taeju Park, Soontae Kim
2011ISLPEDTLB index-based tagging for cache energy reduction.Jongmin Lee, Seokin Hong, Soontae Kim
2011MICROResidue cache: a low-energy low-area L2 cache architecture via compression and partial hits.Soontae Kim, Jongmin Lee, Jesung Kim, Seokin Hong
2010DATESimTag: Exploiting tag bits similarity to improve the reliability of the data caches.Jesung Kim, Soontae Kim, Yebin Lee
2010ICCDLizard: Energy-efficient hard fault detection, diagnosis and isolation in the ALU.Seokin Hong, Soontae Kim
2010MASCOTSModeling and Evaluation of Control Flow Vulnerability in the Embedded System.Mohammad Abdur Rouf, Soontae Kim
2009ISLPEDAn energy-delay efficient 2-level data cache architecture for embedded system.Jongmin Lee, Soontae Kim
2007ICCDImproving the reliability of on-chip L2 cache using redundancy.Koustav Bhattacharya, Soontae Kim, Nagarajan Ranganathan
2007IPCCCReducing ALU and Register File Energy by Dynamic Zero Detection.Soontae Kim
2006DATEArea-efficient error protection for caches.Soontae Kim
2004DATEScheduling Reusable Instructions for Power Reduction.Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin
2003DATEMasking the Energy Behavior of DES Encryption.Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang
2003ISLPEDOn load latency in low-power caches.Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John
2001ISLPEDPower-aware partitioned cache architectures.Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali