Sreehari Veeramachaneni
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
3
Active years
2007–2025
Best venue rank
National
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | VLSID | Optimizing Multipliers: An Energy-Efficient Design Using a Novel 3: 2 Compressor. | L. Hemanth Krishna, Sreehari Veeramachaneni, Srinivasu Bodapati, Bhaskara Rao Jammu, Sk. Noor Mahammad |
| 2024 | VLSID | Fault-Tolerant Floating-Point Multiplier Design for Mission Critical Systems. | Raghavendra Kumar Sakali, Sreehari Veeramachaneni, Sk. Noor Mahammad |
| 2018 | VLSID | An Ultra Low Power, 10-Bit Two-Step Flash ADC for Signal Processing Applications. | Mahesh Kumar Adimulam, Amit Kapoor, Sreehari Veeramachaneni, M. B. Srinivas |
| 2014 | VLSID | An Optimized Design of Reversible Quantum Comparator. | P. Sai Phaneendra, Chetan Kumar Vudadha, Sreehari Veeramachaneni, M. B. Srinivas |
| 2014 | VLSID | A Novel Low Power Error Detection Logic for Inexact Leading Zero Anticipator in Floating Point Units. | B. Naveen Kumar Reddy, M. Chandra Sekhar, Sreehari Veeramachaneni, M. B. Srinivas |
| 2012 | VLSID | Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs. | Chetan Kumar Vudadha, Goutham Makkena, M. Venkata Swamy Nayudu, P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
| 2011 | DSD | A Unified Architecture for BCD and Binary Adder/Subtractor. | Chetan Kumar V., P. Sai Phaneendra, Syed Ershad Ahmed, Sreehari Veeramachaneni, N. Moorthy Muthukrishnan, M. B. Srinivas |
| 2010 | VLSID | An Alternative approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects. | Sandeep Saini, Mahesh Kumar Adimulam, Sreehari Veeramachaneni, M. B. Srinivas |
| 2009 | VLSID | Design of a Low Power, Variable-Resolution Flash ADC. | Sreehari Veeramachaneni, Mahesh Kumar Adimulam, Venkat Tummala, M. B. Srinivas |
| 2008 | VLSID | A Novel Carry-Look Ahead Approach to a Unified BCD and Binary Adder/Subtractor. | Sreehari Veeramachaneni, Kirthi M. Krishna, Prateek G. V., Subroto S., Bharat S., M. B. Srinivas |
| 2007 | ISCAS | Novel High-Speed Redundant Binary to Binary converter using Prefix Networks. | Sreehari Veeramachaneni, Kirthi M. Krishna, Lingamneni Avinash, Reddy Puppala Sreekanth, M. B. Srinivas |
| 2007 | VLSID | Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors. | Sreehari Veeramachaneni, Kirthi M. Krishna, Lingamneni Avinash, Reddy Puppala Sreekanth, M. B. Srinivas |