An Alternative approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects.
Sandeep Saini, Mahesh Kumar Adimulam, Sreehari Veeramachaneni, M. B. Srinivas
Browse the full VLSID paper archive.
Sandeep Saini, Mahesh Kumar Adimulam, Sreehari Veeramachaneni, M. B. Srinivas
Browse the full VLSID paper archive.