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Sreeranga P. Rajan

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

14

Venues

10

Active years

1997–2012

Best venue rank

A*

Where they publish

Papers

14 indexed papers, newest first.

YearVenueTitleAuthors
2012PPoPPGKLEE: concolic verification and test generation for GPUs.Guodong Li, Peng Li, Geoffrey Sawaya, Ganesh Gopalakrishnan, Indradeep Ghosh, Sreeranga P. Rajan
2011CAVKLOVER: A Symbolic Execution and Automatic Test Generation Tool for C++ Programs.Guodong Li, Indradeep Ghosh, Sreeranga P. Rajan
2011FASEAutomated Driver Generation for Analysis of Web Applications.Oksana Tkachuk, Sreeranga P. Rajan
2011ICSoftClient-tier Validation of Dynamic Web Applications.Hideo Tanida, Masahiro Fujita, Mukul R. Prasad, Sreeranga P. Rajan
2011ICSoftAutomated System Testing of Dynamic Web Applications.Hideo Tanida, Mukul R. Prasad, Sreeranga P. Rajan, Masahiro Fujita
2009ICSEWEAVE: WEb Applications Validation Environment.Sreeranga P. Rajan, Oksana Tkachuk, Mukul R. Prasad, Indradeep Ghosh, Nitin Goel, Tadahiro Uehara
2008APLASContext-Sensitive Relevancy Analysis for Efficient Symbolic Execution.Xin Li, Daryl Shannon, Indradeep Ghosh, Mizuhito Ogawa, Sreeranga P. Rajan, Sarfraz Khurshid
2006ISSTAApplication of automated environment generation to commercial software.Oksana Tkachuk, Sreeranga P. Rajan
2002VLSIDFunctional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract).Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan
2000DACAutomatic formal verification of DSP software.David W. Currie, Alan J. Hu, Sreeranga P. Rajan
1999CAVModel Checking Based on Sequential ATPG.Vamsi Boppana, Sreeranga P. Rajan, Koichiro Takayama, Masahiro Fujita
1998FMTwo Real Formal Verification Experiences: ATM Switch Chip and Parallel Cache Protocol.Masahiro Fujita, Sreeranga P. Rajan, Alan J. Hu
1998VLSIDIntegration of High-Level Modeling, Formal Verification, and High-Level Synthesis in ATM Switch Design.Sreeranga P. Rajan, Masahiro Fujita
1997VLSIDIndustrial Strength Formal Verification Techniques for Hardware Designs.Sreeranga P. Rajan, Natarajan Shankar, Mandayam K. Srivas