Steven G. Rothweiler
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
5
Active years
1988–1997
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1997 | VLSID | Deriving Signal Constraints to Accelerate Sequential Test Generation. | Srimat T. Chakradhar, Vijay Gangaram, Steven G. Rothweiler |
| 1995 | VTS | Redundancy Removal and Test Generation for Circuits with Non-Boolean Primitives. | Srimat T. Chakradhar, Steven G. Rothweiler |
| 1993 | DAC | Sequential Circuit Delay optimization Using Global Path Delays. | Srimat T. Chakradhar, Sujit Dey, Miodrag Potkonjak, Steven G. Rothweiler |
| 1992 | ICCAD | Performance optimization of sequential circuits by eliminating retiming bottlenecks. | Sujit Dey, Miodrag Potkonjak, Steven G. Rothweiler |
| 1989 | ICCD | Mind: a module binder for high level synthesis. | Chia-Jeng Tseng, Steven G. Rothweiler, Shailesh Sutarwala, Ajit M. Prabhu |
| 1988 | DAC | Bridge: A Versatile Behavioral Synthesis System. | Chia-Jeng Tseng, Ruey-Sing Wei, Steven G. Rothweiler, Michael M. Tong, Ajoy K. Bose |
| 1988 | DAC | BECOME: Behavior Level Circuit Synthesis Based on Structure Mapping. | Ruey-Sing Wei, Steven G. Rothweiler, Jing-Yang Jou |