| 2026 | ISCA | ATX: Accelerator Task Extensions. | Gerasimos Gerogiannis, Stijn Eyerman, Josep Torrellas, Wim Heirman |
| 2025 | ISPASS | Multi-Core Aware Evaluation of Prefetchers. | Mart Torrents, Paul Caheny, Stijn Eyerman, Wim Heirman |
| 2025 | MICRO | DECA: A Near-Core LLM Decompression Accelerator Grounded on a 3D Roofline Model. | Gerasimos Gerogiannis, Stijn Eyerman, Evangelos Georganas, Wim Heirman, Josep Torrellas |
| 2024 | ISPASS | Message from the Program Chairs; ISPASS 2024. | Wim Heirman, Stijn Eyerman |
| 2023 | ISPASS | Simulating Wrong-Path Instructions in Decoupled Functional-First Simulation. | Stijn Eyerman, Sam Van den Steen, Wim Heirman, Ibrahim Hur |
| 2022 | ISPASS | DRAM Bandwidth and Latency Stacks: Visualizing DRAM Bottlenecks. | Stijn Eyerman, Wim Heirman, Ibrahim Hur |
| 2022 | ISPASS | Scale-Model Architectural Simulation. | Wenjie Liu, Wim Heirman, Stijn Eyerman, Shoaib Akram, Lieven Eeckhout |
| 2021 | MICRO | Enabling Branch-Mispredict Level Parallelism by Selectively Flushing Instructions. | Stijn Eyerman, Wim Heirman, Sam Van den Steen, Ibrahim Hur |
| 2018 | ISPASS | Extending the Performance Analysis Tool Box: Multi-stage CPI Stacks and FLOPS Stacks. | Stijn Eyerman, Wim Heirman, Kristof Du Bois, Ibrahim Hur |
| 2018 | SC | Many-core graph workload analysis. | Stijn Eyerman, Wim Heirman, Kristof Du Bois, Joshua B. Fryman, Ibrahim Hur |
| 2017 | HPCA | Reliability-Aware Scheduling on Heterogeneous Multicore Processors. | Ajeya Naithani, Stijn Eyerman, Lieven Eeckhout |
| 2017 | ISPASS | Analyzing the scalability of managed language applications with speedup stacks. | Jennifer B. Sartor, Kristof Du Bois, Stijn Eyerman, Lieven Eeckhout |
| 2016 | HPCA | Symbiotic job scheduling on the IBM POWER8. | Josu Feliu, Stijn Eyerman, Julio Sahuquillo, Salvador Petit |
| 2015 | ISPASS | Revisiting symbiotic job scheduling. | Stijn Eyerman, Pierre Michaud, Wouter Rogiest |
| 2015 | ISPASS | Micro-architecture independent branch behavior characterization. | Sander De Pestel, Stijn Eyerman, Lieven Eeckhout |
| 2015 | ISPASS | Micro-architecture independent analytical processor performance and power modeling. | Sam Van den Steen, Sander De Pestel, Moncef Mechri, Stijn Eyerman, Trevor E. Carlson, David Black-Schaffer, Erik Hagersten, Lieven Eeckhout |
| 2014 | ASPLOS | The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism. | Stijn Eyerman, Lieven Eeckhout |
| 2013 | ISCA | Criticality stacks: identifying critical threads in parallel programs using synchronization behavior. | Kristof Du Bois, Stijn Eyerman, Jennifer B. Sartor, Lieven Eeckhout |
| 2013 | OOPSLA | Bottle graphs: visualizing scalability bottlenecks in multi-threaded applications. | Kristof Du Bois, Jennifer B. Sartor, Stijn Eyerman, Lieven Eeckhout |
| 2012 | ISCA | A first-order mechanistic model for architectural vulnerability factor. | Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy Kurian John |
| 2012 | ISPASS | A mechanistic performance model for superscalar in-order processors. | Maximilien Breughe, Stijn Eyerman, Lieven Eeckhout |
| 2012 | ISPASS | Speedup stacks: Identifying scaling bottlenecks in multi-threaded applications. | Stijn Eyerman, Kristof Du Bois, Lieven Eeckhout |
| 2011 | ISPASS | Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware. | Stijn Eyerman, Kenneth Hoste, Lieven Eeckhout |
| 2010 | ASPLOS | Probabilistic job symbiosis modeling for SMT processor scheduling. | Stijn Eyerman, Lieven Eeckhout |
| 2010 | HPCA | Interval simulation: Raising the level of abstraction in architectural simulation. | Davy Genbrugge, Stijn Eyerman, Lieven Eeckhout |
| 2010 | ISCA | Modeling critical sections in Amdahl's law and its implications for multicore design. | Stijn Eyerman, Lieven Eeckhout |
| 2009 | ASPLOS | Per-thread cycle accounting in SMT processors. | Stijn Eyerman, Lieven Eeckhout |
| 2007 | HPCA | A Memory-Level Parallelism Aware Fetch Policy for SMT Processors. | Stijn Eyerman, Lieven Eeckhout |
| 2006 | ASPLOS | A performance counter architecture for computing accurate CPI components. | Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith |
| 2006 | DATE | Efficient design space exploration of high performance embedded out-of-order processors. | Stijn Eyerman, Lieven Eeckhout, Koen De Bosschere |
| 2006 | ISPASS | Characterizing the branch misprediction penalty. | Stijn Eyerman, James E. Smith, Lieven Eeckhout |