Subodh Gupta
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1997–2009
Best venue rank
A*
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | FPGA | Clock power reduction for virtex-5 FPGAs. | Qiang Wang, Subodh Gupta, Jason Helge Anderson |
| 1999 | ISLPED | Power macro-models for DSP blocks with application to high-level synthesis. | Subodh Gupta, Farid N. Najm |
| 1999 | ISLPED | Energy-per-cycle estimation at RTL. | Subodh Gupta, Farid N. Najm |
| 1997 | DAC | Power Macromodeling for High Level Power Estimation. | Subodh Gupta, Farid N. Najm |