| 2026 | ASPDAC | FIFOAdvisor: A DSE Framework for Automated FIFO Sizing of High-Level Synthesis Designs. | Stefan Abi-Karam, Rishov Sarkar, Suhail Basalama, Jason Cong, Callie Hao |
| 2025 | FCCM | NoH: NoC Compilation in High-Level Synthesis. | Huifeng Ke, Sihao Liu, Licheng Guo, Zifan He, Linghao Song, Suhail Basalama, Yuze Chi, Tony Nowatzki, Jason Cong |
| 2025 | FPGA | Stream-HLS: Towards Automatic Dataflow Acceleration. | Suhail Basalama, Jason Cong |
| 2024 | ASPLOS | TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. | Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong |
| 2023 | DAC | A Comprehensive Automated Exploration Framework for Systolic Array Designs. | Suhail Basalama, Jie Wang, Jason Cong |
| 2023 | FPGA | Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. | Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong |
| 2022 | FCCM | A Versatile Systolic Array for Transposed and Dilated Convolution on FPGA. | Suhail Basalama, Atefeh Sohrabizadeh, Jie Wang, Jason Cong |
| 2021 | FPL | A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications. | Atiyehsadat Panahi, Suhail Basalama, Ange-Thierry Ishimwe, Joel Mandebi Mbongue, David Andrews |