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Sukumar Jairam

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

7

Venues

3

Active years

2004–2010

Best venue rank

National

Where they publish

Papers

7 indexed papers, newest first.

YearVenueTitleAuthors
2010DATEClock gating approaches by IOEX graphs and cluster efficiency plots.Jithendra Srinivas, Sukumar Jairam
2008ISLPEDClock gating for power optimization in ASIC design cycle theory & practice.Sukumar Jairam, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, H. Udayakumar, Jagdish C. Rao
2008VLSIDGyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes.Sukumar Jairam, Navakanta Bhat
2007VLSIDCalibration Based Methods for Substrate Modeling and Noise Analysis for Mixed-Signal SoCsc.Sankar P. Debnath, Ganesh P. Kumar, Sukumar Jairam
2006VLSIDA Methodology for Switching Activity Based IO Powerpad Optimisation.Snehashis Roy, Sukumar Jairam, H. Udayakumar
2005VLSIDA Methodology for Fast Vector Based Power Supply and Substrate Noise Analyses.Sankar P. Debnath, Sukumar Jairam, H. Udayakumar
2004VLSIDA Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework.Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap