| 2023 | ISCAS | Backpropagating Errors Through Memristive Spiking Neural Networks. | Peng Zhou, Dong-Uk Choi, Sung-Mo Kang, Jason K. Eshraghian |
| 2022 | ISCAS | A Fully Memristive Spiking Neural Network with Unsupervised Learning. | Peng Zhou, Dong-Uk Choi, Jason Kamran Eshraghian, Sung-Mo Kang |
| 2016 | ISCAS | RRAM-based TCAMs for pattern search. | Le Zheng, Sangho Shin, G. Scott Lloyd, Maya B. Gokhale, Kyungmin Kim, Sung-Mo Kang |
| 2012 | ISCAS | Maximizing power harvest in a distributed photovoltaic system. | Yong Sin Kim, Sung-Mo Kang, Roland Winston |
| 2012 | ISCAS | Memristive computing- multiplication and correlation. | Sangho Shin, Kyungmin Kim, Sung-Mo Kang |
| 2011 | ISCAS | Stateful logic pipeline architecture. | Kyosun Kim, Sangho Shin, Sung-Mo Kang |
| 2011 | ISCAS | Complementary structure of memristive devices based passive memory arrays. | Sangho Shin, Kyungmin Kim, Sung-Mo Kang |
| 2008 | ISCAS | Design of a 6 bit 1.25 GS/s DAC for WPAN. | Jae-Jin Jung, Kwang-Hyun Baek, Shin-Il Lim, Suki Kim, Sung-Mo Kang |
| 2008 | ISCAS | A 8-Gb/s/pin current mode multi-level simultaneous bidirectional I/O. | Yong Sin Kim, Sung-Mo Kang |
| 2008 | ISCAS | 0.18um CMOS integrated chipset for 5.8GHz DSRC systems with +10dBm output power. | Sangho Shin, Seokoh Yun, Sanghyun Cho, Jongmoon Kim, Minseok Kang, Wonkab Oh, Sung-Mo Kang |
| 2007 | ICCD | Analytical thermal placement for VLSI lifetime improvement and minimum performance variation. | Andrew B. Kahng, Sung-Mo Kang, Wei Li, Bao Liu |
| 2006 | ISCAS | A 4-Gb/s/pin current mode 4-level simultaneous bidirectional I/O with current mismatch calibration. | Yong Sin Kim, Sangho Shin, Sung-Mo Kang |
| 2006 | ISCAS | 2.4GHz ZigBee radio architecture with fast frequency offset cancellation loop. | Sangho Shin, Kwyro Lee, Sung-Mo Kang |
| 2006 | ISCAS | Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors. | Sangho Shin, Kwyro Lee, Sung-Mo Kang |
| 2005 | ISCAS | Current mode multi-level simultaneous bidirectional I/O scheme for chip-to-chip communications. | Ge Yang, Yong Sin Kim, Sung-Mo Kang |
| 2004 | ISCAS | A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic. | Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang |
| 2004 | VLSID | Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies. | Ge Yang, Zhongda Wang, Sung-Mo Kang |
| 2003 | ISCAS | 1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. | Kwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang |
| 2003 | ISLPED | Elements of low power design for integrated systems. | Sung-Mo Kang |
| 2003 | VLSID | Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers. | Yong Sin Kim, Soo Hwan Kim, Kwang-Hyun Baek, Suki Kim, Sung-Mo Kang |
| 2002 | DAC | Low-swing clock domino logic incorporating dual supply and dual threshold voltages. | Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang |
| 2002 | DAC | VeriCDF: a new verification methodology for charged device failures. | Jaesik Lee, Ki-Wook Kim, Sung-Mo Kang |
| 2002 | DATE | Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constrain. | Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang |
| 2002 | ISCAS | A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance. | Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang |
| 2001 | DAC | Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique. | Ki-Wook Kim, Seong-Ook Jung, Prashant Saxena, C. L. Liu, Sung-Mo Kang |
| 2001 | ICCD | Understanding and Addressing the Noise Induced By Electrostatic Discharge in Multiple Power Supply Systems. | Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang |
| 2001 | ISCAS | Model-order reduction of nonlinear MEMS devices through arclength-based Karhunen-Loeve decomposition. | Jinghong Chen, Sung-Mo Kang |
| 2001 | ISCAS | Noise constrained power optimization for dual VT domino logic. | Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang |
| 2001 | ISCAS | Skew-tolerant high-speed (STHS) domino logic. | Seong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang |
| 2001 | ISCAS | Coupling-aware minimum delay optimization for domino logic circuits. | Ki-Wook Kim, Seong-Ook Jung, Sung-Mo Kang |
| 2001 | ISCAS | A low-power reduced swing single clock flip-flop. | Chulwoo Kim, Sung-Mo Kang |
| 2001 | ISCAS | Energy-efficient skewed static logic design with dual Vt. | Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang |
| 2001 | ISCAS | Design-for-ESD-reliability for high-frequency I/O interface circuits in deep-submicron CMOS technology. | Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang |
| 2001 | ISCAS | ESD design rule checker. | Q. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang |
| 2001 | ISCAS | Full chip ESD design rule checking. | Q. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang |
| 2001 | ISCAS | Trapezoid-to-simple polygon recomposition for resistance extraction. | Q. Li, Sung-Mo Kang |
| 2001 | ISCAS | Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT. | Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang |
| 2001 | ISCAS | New current-mode sense amplifiers for high density DRAM and PIM architectures. | Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang |
| 2000 | DAC | Domino logic synthesis minimizing crosstalk. | Ki-Wook Kim, Unni Narayanan, Sung-Mo Kang |
| 2000 | DAC | When bad things happen to good chips (panel session). | N. S. Nagaraj, Andrzej J. Strojwas, Sani R. Nassif, Ray Hokinson, Tak Young, Wonjae L. Kang, David Overhauser, Sung-Mo Kang |
| 2000 | DAC | Fast temperature calculation for transient electrothermal simulation by mixed frequency/time domain thermal model reduction. | Ching-Han Tsai, Sung-Mo Kang |
| 2000 | GLOBECOM | Compensation modeling for QoS support on a wireless network. | Stefan Bucheli, Jay R. Moorman, John W. Lockwood, Sung-Mo Kang |
| 2000 | ICCAD | Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design. | Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, C. L. Liu, Sung-Mo Kang |
| 2000 | ICCD | High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. | Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina, Sung-Mo Kang |
| 2000 | ISCAS | An algorithm for automatic model-order reduction of nonlinear MEMS devices. | Jinghong Chen, Sung-Mo Kang |
| 2000 | ISCAS | Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic. | Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang |
| 2000 | ISCAS | New high performance sub-1 V circuit technique with reduced standby current and robust data holding. | Seung-Moon Yoo, Sung-Mo Kang |
| 2000 | ISCAS | Detection and elimination of initial transient for accurate power analysis. | Li-Pen Yuan, Sung-Mo Kang |
| 2000 | ISLPED | Noise-aware power optimization for on-chip interconnect. | Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang |
| 2000 | WoWMoM | Real-time prioritized call admission control in a base station scheduler. | Jay R. Moorman, John W. Lockwood, Sung-Mo Kang |
| 1999 | DAC | Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation. | Tong Li, Ching-Han Tsai, Elyse Rosenbaum, Sung-Mo Kang |
| 1999 | DATE | Logic Transformation for Low Power Synthesis. | Ki-Wook Kim, Sung-Mo Kang, TingTing Hwang, C. L. Liu |
| 1999 | ICCAD | An efficient method for hot-spot identification in ULSI circuits. | Yi-Kan Cheng, Sung-Mo Kang |
| 1999 | ICCAD | Implication graph based domino logic synthesis. | Ki-Wook Kim, C. L. Liu, Sung-Mo Kang |
| 1999 | ISCAS | Temperature-driven power and timing analysis for CMOS ULSI circuits. | Yi-Kan Cheng, Sung-Mo Kang |
| 1999 | ISCAS | A mixed frequency-time approach for quasi-periodic steady-state simulation of multi-level modeled circuits. | Jinghong Chen, Sung-Mo Kang |
| 1999 | ISCAS | Macrocell placement with temperature profile optimization. | Ching-Han Tsai, Sung-Mo Kang |
| 1999 | ISCAS | CMOS Pass-gate No-race Charge-recycling Logic (CPNCL). | Seung-Moon Yoo, Sung-Mo Kang |
| 1998 | DAC | Layout Extraction and Verification Methodology CMOS I/O Circuits. | Tong Li, Sung-Mo Kang |
| 1998 | ICCAD | Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress. | Tong Li, Ching-Han Tsai, Sung-Mo Kang |
| 1997 | DAC | An Efficient Transistor Folding Algorithm for Row-Based CMOS Layout Design. | Jaewon Kim, Sung-Mo Kang |
| 1997 | DAC | Statistical Estimation of Average Power Dissipation in Sequential Circuits. | Li-Pen Yuan, Chin-Chi Teng, Sung-Mo Kang |
| 1997 | INFOCOM | A High-Performance OC-12/OC-48 Queue Design Prototype for Input-buffered ATM Switches. | Haoran Duan, John W. Lockwood, Sung-Mo Kang, J. D. Will |
| 1997 | ISLPED | A sequential procedure for average power analysis of sequential circuits. | Li-Pen Yuan, Sung-Mo Kang |
| 1996 | DAC | iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips. | Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury, Elyse Rosenbaum, Sung-Mo Kang |
| 1996 | DAC | Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects. | Chin-Chi Teng, Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang |
| 1996 | DATE | ETS-A: A New Electrothermal Simulator for CMOS VLSI Circuits. | Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang |
| 1996 | ISLPED | Statistical estimation of average power dissipation in CMOS VLSI circuits using nonparametric techniques. | Li-Pen Yuan, Chin-Chi Teng, Sung-Mo Kang |
| 1995 | ICCAD | An empirical model for accurate estimation of routing delay in FPGAs. | Tanay Karnik, Sung-Mo Kang |
| 1995 | ICCAD | A timing-driven data path layout synthesis with integer programming. | Jaewon Kim, Sung-Mo Kang |
| 1995 | ICCAD | Estimation of maximum transition counts at internal nodes in CMOS VLSI circuits. | Chin-Chi Teng, Anthony M. Hill, Sung-Mo Kang |
| 1995 | ISCAS | Estimating Node Voltages in Bipolar Circuits Using Linear Programming. | Elizabeth J. Brauer, Sung-Mo Kang |
| 1995 | ISCAS | An Analytic Method to Calculate Emitter Follower Delay Using Trial Functions in Coupled Node Equations. | Elizabeth J. Brauer, Sung-Mo Kang |
| 1995 | ISCAS | Chip-Level Thermal Simulator to Predict VLSI Chip Temperature. | Yi-Kan Cheng, Sung-Mo Kang |
| 1995 | ISCAS | Incremental Node Extraction Algorithms for Incremental Layout System. | Myong H. Cynn, Sung-Mo Kang |
| 1995 | ISLPED | Determining accuracy bounds for simulation-based switching activity estimation. | Anthony M. Hill, Sung-Mo Kang |
| 1994 | ICCAD | Fast timing simulation of transient faults in digital circuits. | Abhijit Dharchoudhury, Sung-Mo Kang, Hungse Cha, Janak H. Patel |
| 1994 | ICCAD | Fast and accurate timing simulation with regionwise quadratic models of MOS I-V characteristics. | Abhijit Dharchoudhury, Sung-Mo Kang, K. H. (Kane) Kim, S. H. Lee |
| 1994 | ISCAS | Forum: From 100 Milliwatts/MIPS to 10 Microwatts/MIPS. | Eby G. Friedman, Sung-Mo Kang, Eric A. Vittoz, David J. Allstot, Erik P. Harris, Ran-Hong Yan |
| 1994 | ISCAS | High Performance CMOS Macromodule Layout Synthesis. | Jaewon Kim, Sung-Mo Kang, Sachin S. Sapatnekar |
| 1994 | PPSN | Genetic Algorithm Based Design Optimization Of CMOS VLSI Circuits. | Anthony M. Hill, Sung-Mo Kang |
| 1993 | DAC | Performance-Constrained Worst-Case Variability Minimization of VLSI Circuits. | Abhijit Dharchoudhury, Sung-Mo Kang |
| 1993 | DAC | Fast Approximation of the Transient Response of Lossy Transmision Line Trees. | Mysore Sriram, Sung-Mo Kang |
| 1993 | ISCAS | Functional Verification of ECL Circuits Including Voltage Regulators. | Elizabeth J. Brauer, Sung-Mo Kang |
| 1993 | ISCAS | Thermal Failure Simulation for Electrical Overstress in Semiconductor Devices. | Carlos H. Daz, Charvaka Duvvury, Sung-Mo Kang |
| 1993 | ISCAS | Feasible Region Approximation Using Convex Polytopes. | Sachin S. Sapatnekar, Pravin M. Vaidya, Sung-Mo Kang |
| 1992 | DAC | An Integrated Approach to Realistic Worst-Case Design Optimization of MOS Analog Circuits. | Abhijit Dharchoudhury, Sung-Mo Kang |
| 1992 | ICCAD | Detailed layer assignment for MCM routing. | Mysore Sriram, Sung-Mo Kang |
| 1991 | DAC | ILLIADS: A New Fast MOS Timing Simulator Using Direct Equation-Solving Approach. | Yung-Ho Shih, Sung-Mo Kang |
| 1991 | ICCAD | New Simulation Methods for MOS VLSI Timing and Reliability. | Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang |
| 1990 | ICCAD | An Integrated Hot-Carrier Degradation Simulator for VLSI Reliability Analysis. | Yusuf Leblebici, Sung-Mo Kang |
| 1989 | ICCAD | A custom cell generation system for double-metal CMOS technology. | P. Gee, Ibrahim N. Hajj, Sung-Mo Kang |
| 1989 | ICCAD | An efficient method for parametric yield optimization of MOS integrated circuits. | Tat-Kwan Yu, Sung-Mo Kang, Jerome Sacks, William J. Welch |
| 1989 | ICCD | Simulation of MOS circuit performance degradation with emphasis on VLSI design-for-reliability. | Yusuf Leblebici, Sung-Mo Kang |
| 1988 | ICCAD | iCOACH: a circuit optimization aid for CMOS high-performance circuits. | H. Y. Chen, Sung-Mo Kang |
| 1988 | ICCAD | An efficient method for circuit sensitivity calculation using piecewise linear waveform models. | Sung-Mo Kang, Yusuf Leblebici |
| 1988 | ICCAD | iEDISON: an interactive statistical design tool for MOS VLSI circuits. | Tat-Kwan Yu, Sung-Mo Kang, Ibrahim N. Hajj, Timothy N. Trick |
| 1982 | DAC | Gate matrix layout of random control logic in a 32-bit CMOS CPU chip adaptable to evolving logic design. | Sung-Mo Kang, Robert H. Krambeck, Hung-Fai Stephen Law |