Sushanta K. Mandal
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2006–2010
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | VLSID | A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process. | Arunkumar Salimath, Chandrajit Debnath, Kallol Chatterjee, Sushanta K. Mandal |
| 2006 | VLSID | A Wide-Band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design. | Sushanta K. Mandal, Arijit De, Amit Patra, Shamik Sural |