A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process.
Arunkumar Salimath, Chandrajit Debnath, Kallol Chatterjee, Sushanta K. Mandal
Browse the full VLSID paper archive.
Arunkumar Salimath, Chandrajit Debnath, Kallol Chatterjee, Sushanta K. Mandal
Browse the full VLSID paper archive.