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Takayasu Sakurai

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

47

Venues

7

Active years

1988–2019

Best venue rank

A*

Where they publish

Papers

47 indexed papers, newest first.

YearVenueTitleAuthors
2019ISCASCoupling-Dependent Data Flipping in Wireless Power and Data Transfer System.Hao Qiu, Takayasu Sakurai, Makoto Takamiya
2019IECONDigital Active Gate Drive with Optimal Switching Patterns to Adapt to Sinusoidal Output Current in a Full Bridge Inverter Circuit.Yu-Shan Cheng, Daiki Yamaguchi, Tomoyuki Mannen, Keiji Wada, Toru Sai, Koutaro Miyazaki, Makoto Takamiya, Takayasu Sakurai
2017ISCASModeling of 3-level buck converters in discontinuous conduction mode for stand-by mode power supply.Yoshitaka Yamauchi, Toru Sai, Takayasu Sakurai, Makoto Takamiya
2013ASPDAC315MHz OOK transceiver with 38-W receiver and 36-W transmitter in 40-nm CMOS.Shunta Iguchi, Akira Saito, Kentaro Honda, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2013ASPDACA low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS.Xin Zhang, Po-Hung Chen, Yoshikatsu Ryu, Koichi Ishida, Yasuyuki Okuma, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2013DACElectrical artificial skin using ultraflexible organic transistor.Tsuyoshi Sekitani, Tomoyuki Yokota, Makoto Takamiya, Takayasu Sakurai, Takao Someya
2012ASPDACA 120-mV input, fully integrated dual-mode charge pump in 65-nm CMOS for thermoelectric energy harvester.Po-Hung Chen, Koichi Ishida, Xin Zhang, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai
2012ISLPED0.35V, 4.1μW, 39MHz crystal oscillator in 40nm CMOS.Akira Saito, Yun Fei Zheng, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya
2011ASPDACAn on-chip characterizing system for within-die delay variation measurement of individual standard cells in 65-nm CMOS.Xin Zhang, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai
2011DACA closed-form expression for estimating minimum operating voltage (VHiroshi Fuketa, Satoshi Iida, Tadashi Yasufuku, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai
2011ISLPED12.7-times energy efficiency increase of 16-bit integer unit by power supply voltage (VHiroshi Fuketa, Koji Hirairi, Tadashi Yasufuku, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai
2011ISLPEDReduction of minimum operating voltage (VKentaro Honda, Katsuyuki Ikeuchi, Masahiro Nomura, Makoto Takamiya, Takayasu Sakurai
2011ISLPEDDesigning ultra-low voltage logic.Takayasu Sakurai
2011ISLPEDInvestigation of determinant factors of minimum operating voltage of logic gates in 65-nm CMOS.Tadashi Yasufuku, Satoshi Iida, Hiroshi Fuketa, Koji Hirairi, Masahiro Nomura, Makoto Takamiya, Takayasu Sakurai
2010ICCADMisleading energy and performance claims in sub/near threshold digital systems.Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Masahiro Nomura, Koji Hirairi, Hidehiro Takata, Taro Sakurabayashi, Shinji Miyano, Makoto Takamiya, Takayasu Sakurai
2010ICCADDesign of large area electronics with organic transistors.Makoto Takamiya, Koichi Ishida, Tsuyoshi Sekitani, Takao Someya, Takayasu Sakurai
2009ASPDACA 100Mbps, 0.19mW asynchronous threshold detector with DC power-free pulse discrimination for impulse UWB receiver.Lechang Liu, Yoshio Miyamoto, Zhiwei Zhou, Kosuke Sakaida, Jisun Ryu, Koichi Ishida, Makoto Takamiya, Takayasu Sakurai
2009ISLPEDInductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories.Tadashi Yasufuku, Koichi Ishida, Shinji Miyamoto, Hiroto Nakai, Makoto Takamiya, Takayasu Sakurai, Ken Takeuchi
2008ISLPEDIncreasing minimum operating voltage (VTaro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai
2008ISLPEDNext-generation power-aware design.Takayasu Sakurai
2007ASPDACMeeting with the Forthcoming IC Design "The Era of Power, Variability and NRE Explosion and a Bit of the Future".Takayasu Sakurai
2006ASPDACA 0.5-V sigma-delta modulator using analog T-switch scheme for the subthreshold leakage suppression.Koichi Ishida, Atit Tamtrakarn, Takayasu Sakurai
2005ISCASSubthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS).Koichi Ishida, Kouichi Kanda, Atit Tamtrakarn, Hiroshi Kawaguchi, Takayasu Sakurai
2005ISCASMore than two orders of magnitude leakage current reduction in look-up table for FPGAs.Canh Quang Tran, Hiroshi Kawaguchi, Takayasu Sakurai
2003DACReshaping EDA for power.Jan M. Rabaey, Dennis Sylvester, David T. Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang
2002ICCADMinimizing power across multiple technology and design levels.Takayasu Sakurai
2002ISCASCMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits.Kyeong-Sik Min, Young-Hee Kim, Jin-Hong Ahn, Jin-Yong Chung, Takayasu Sakurai
2002ISLPEDPower-conscious interconnect buffer optimization with improved modeling of driver MOSFET and Its implications to bulk and SOI CMOS technology.Koichi Nose, Takayasu Sakurai
2001DACCoupling-Driven Bus Design for Low-Power Application-Specific Systems.Youngsoo Shin, Takayasu Sakurai
2001ISCASAn LSI for VDD-hopping and MPEG4 system based on the chip.Hiroshi Kawaguchi, Gang Zhang, Seongsoo Lee, Takayasu Sakurai
2001ISLPEDDesign methodology and optimization strategy for dual-VTH scheme using commercially available tools.Masayuki Hirabayashi, Koichi Nose, Takayasu Sakurai
2001ISLPEDVTCMOS characteristics and its optimum conditions predicted by a compact analytical model.Hyunsik Im, Takashi Inukai, Hiroyuki Gomyo, Toshiro Hiramoto, Takayasu Sakurai
2001ISLPEDVariable threshold CMOS (VTCMOS) in series connected circuits.Takashi Inukai, Toshiro Hiramoto, Takayasu Sakurai
2001ISLPEDEstimation of power distribution in VLSI interconnects.Youngsoo Shin, Takayasu Sakurai
2000ASPDACCompact yet high performance (CyHP) library for short time-to-market with new technologies.Nguyen Minh Duc, Takayasu Sakurai
2000ASPDACRun-time power control scheme using software feedback loop for low-power real-time application.Seongsoo Lee, Takayasu Sakurai
2000ASPDACOptimization of VDD and VTH for low-power and high speed applications.Koichi Nose, Takayasu Sakurai
2000ASPDACDesign challenges for 0.1um and beyond: embedded tutorial.Takayasu Sakurai
2000DACRun-time voltage hopping for low-power real-time systems.Seongsoo Lee, Takayasu Sakurai
2000ICCADPower Optimization of Real-Time Embedded Systems on Variable Speed Processors.Youngsoo Shin, Kiyoung Choi, Takayasu Sakurai
2000ISLPEDVoltage dependent gate capacitance and its impact in estimating power and delay of CMOS digital circuits with low supply voltage (poster session).Koichi Nose, Soo-Ik Chae, Takayasu Sakurai
1998ASPDACDelay and Noise Formulas for Capacitively Coupled Distributed RC Lines.Hiroshi Kawaguchi, Takayasu Sakurai
1998ICCDA fine-grain, current mode scheme for VLSI proximity search engine.Seiji Takeuchi, Takayasu Sakurai
1996ISLPEDSubstrate noise influence on circuit performance in variable threshold-voltage scheme.Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Toshiaki Mori, Kenji Matsuo, Masakazu Kakumu, Takayasu Sakurai
1993ISCASHigh-Speed Circuit Design with Scaled-Down MOSFET's and Low Supply Voltage.Takayasu Sakurai
1988ICCADCMOS inverter delay and other formulas using alpha -power law MOS model.Takayasu Sakurai
1988ICCDLarge memory embedded ASICs.Tetsuya Iizuka, Takayasu Sakurai, J. Matsunaga, K. Maeguchi, K. Kawagai, T. Kobayashi, Y. Shiotari, K. Kobayashi, T. Miyoshi