Tasuku Fujibe
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2009–2016
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ETS | An optical/electrical test system for 100Gb/s optical interconnection devices with high volume testing capability. | Tasuku Fujibe, Kazuki Shirahata, Takeshi Mizushima, Hidenobu Matsumura, Daisuke Watanabe, Hiroyuki Mineo, Shin Masuda |
| 2012 | ITC | 8Gbps CMOS pin electronics hardware macro with simultaneous bi-directional capability. | Shoji Kojima, Yasuyuki Arai, Tasuku Fujibe, Tsuyoshi Ataka, Atsushi Ono, Ken-ichi Sawada, Daisuke Watanabe |
| 2009 | ITC | Dynamic arbitrary jitter injection method for ≫6.5Gb/s SerDes testing. | Tasuku Fujibe, Masakatsu Suda, Kazuhiro Yamamoto, Yoshihito Nagata, Kazuhiro Fujita, Daisuke Watanabe, Toshiyuki Okayasu |