Tezaswi Raja
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
2003–2005
Best venue rank
National
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | VLSID | Variable Input Delay CMOS Logic for Low Power Design. | Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bushnell |
| 2004 | CCGRID | Using a Jini based desktop Grid for test vector compaction and a refined economic model. | Tezaswi Raja, Manish Parashar |
| 2004 | VLSID | A Tuturial on the Emerging Nanotechnology Devices. | Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bushnell |
| 2004 | VLSID | CMOS Circuit Design for Minimum Dynamic Power and Highest Speed. | Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bushnell |
| 2003 | VLSID | Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program. | Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bushnell |