| 2026 | ISCAS | RCW-CIM: A Digital CIM-based LLM Accelerator with Read-Compute/Write. | Yan-Cheng Guo, Tian-Sheuan Chang, Jian-Wei Su |
| 2026 | ISCAS | VitaLLM: A Versatile and Tiny Accelerator for Mixed-Precision LLM Inference on Edge Devices. | Zi-Wei Lin, Tian-Sheuan Chang |
| 2025 | ISCAS | Hardware Efficient Accelerator for Spiking Transformer With Reconfigurable Parallel Time Step Computing. | Bo-Yu Chen, Tian-Sheuan Chang |
| 2025 | ISCAS | A Low-Power Sparse Deep Learning Accelerator with Optimized Data Reuse. | Kai-Chieh Hsu, Tian-Sheuan Chang |
| 2025 | ISCAS | An Efficient Data Reuse with Tile-Based Adaptive Stationary for Transformer Accelerators. | Tseng-Jen Li, Tian-Sheuan Chang |
| 2024 | DATE | A Multi-Bit Near-RRAM based Computing Macro with Highly Computing Parallelism for CNN Application. | Kuan-Chih Lin, Hao Zuo, Hsiang-Yu Wang, Yuan-Ping Huang, Ci-Hao Wu, Yan-Cheng Guo, Shyh-Jye Jou, Tuo-Hung Hou, Tian-Sheuan Chang |
| 2024 | ISCAS | CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device. | Yan-Cheng Guo, Tian-Sheuan Chang, Chih-Sheng Lin, Bo-Cheng Chiou, Chih-Ming Lai, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang |
| 2024 | ISCAS | Dynamic Gradient Sparse Update for Edge Training. | I-Hsuan Li, Tian-Sheuan Chang |
| 2023 | ISCAS | FPCIM: A Fully-Parallel Robust ReRAM CIM Processor for Edge AI Devices. | Yan-Cheng Guo, Wei-Tien Lin, Tuo-Hung Hou, Tian-Sheuan Chang |
| 2022 | ISCAS | A Real Time Super Resolution Accelerator with Tilted Layer Fusion. | An-Jung Huang, Kai-Chieh Hsu, Tian-Sheuan Chang |
| 2022 | ISCAS | PSCNN: A 885.86 TOPS/W Programmable SRAM-based Computing-In-Memory Processor for Keyword Spotting. | Shu-Hung Kuo, Tian-Sheuan Chang |
| 2022 | ISCAS | BSRA: Block-based Super Resolution Accelerator with Hardware Efficient Pixel Attention. | Dun-Hao Yang, Tian-Sheuan Chang |
| 2021 | ISCAS | VSA: Reconfigurable Vectorwise Spiking Neural Network Accelerator. | Hong-Han Lien, Chung-Wei Hsu, Tian-Sheuan Chang |
| 2020 | ISCAS | Efficient Accelerator for Dilated and Transposed Convolution with Decomposition. | Kuo-Wei Chang, Tian-Sheuan Chang |
| 2020 | ISCAS | Zebra: Memory Bandwidth Reduction for CNN Accelerators with Zero Block Regularization of Activation Maps. | Hsu-Tung Shih, Tian-Sheuan Chang |
| 2020 | ISCAS | Real-Time Wearable Gait Phase Segmentation for Running And Walking. | Jien-De Sui, Wei-Han Chen, Tzyy-Yuang Shiang, Tian-Sheuan Chang |
| 2019 | DAC | NV-BNN: An Accurate Deep Convolutional Neural Network Based on Binary STT-MRAM for Adaptive AI Edge. | Chih-Cheng Chang, Ming-Hung Wu, Jia-Wei Lin, Chun-Hsien Li, Vivek Parmar, Heng-Yuan Lee, Jeng-Hua Wei, Shyh-Shyuan Sheu, Manan Suri, Tian-Sheuan Chang, Tuo-Hung Hou |
| 2019 | ISCAS | VSCNN: Convolution Neural Network Accelerator with Vector Sparsity. | Kuo-Wei Chang, Tian-Sheuan Chang |
| 2018 | HCI | A Scoping Study on the Development of an Interactive Upper-Limb Rehabilitation System Framework for Patients with Stroke. | Kevin C. Tseng, Alice M. K. Wong, Chung-Yu Wu, Tian-Sheuan Chang, Yu-Cheng Pei, Jean-Lon Chen |
| 2017 | ISCAS | Fast rate distortion optimization with adaptive context group modeling for HEVC. | Hung-Cheng Chen, Tian-Sheuan Chang |
| 2016 | ISCAS | Fast intra prediction algorithm and design for high efficiency video coding. | Han-Chiou Fang, Hung-Cheng Chen, Tian-Sheuan Chang |
| 2015 | ISCAS | A hardware-efficient deblocking filter design for HEVC. | Chih-Chung Fang, I-Wen Chen, Tian-Sheuan Chang |
| 2014 | ISCAS | Gradient-based PU size selection for HEVC intra prediction. | Yi-Ching Ting, Tian-Sheuan Chang |
| 2013 | ISCAS | A reconfigurable inverse transform architecture design for HEVC decoder. | Pai-Tse Chiang, Tian-Sheuan Chang |
| 2013 | ISCAS | Fast zero block detection and early CU termination for HEVC Video Coding. | Pai-Tse Chiang, Tian-Sheuan Chang |
| 2012 | ISCAS | A high throughput CAVLC design for HEVC. | Hsuan-ku Chen, Tian-Sheuan Chang |
| 2012 | ISCAS | A low complexity speech coder for binaural communication in hearing aids. | Shuo-Wen Hsu, Tian-Sheuan Chang |
| 2012 | VCIP | Fast disparity estimation for 3DTV applications. | Yu-Cheng Tseng, Tian-Sheuan Chang |
| 2011 | VCIP | A 94fps view synthesis engine for HD1080p video. | Fu-Jen Chang, Yu-Cheng Tseng, Tian-Sheuan Chang |
| 2010 | ISCAS | Efficient inter-layer prediction hardware design with extended spatial scalability for H.264/AVC scalable extension. | Yu-Chen Chen, Gwo-Long Li, Tian-Sheuan Chang |
| 2010 | ISCAS | Stereoscopic images generation with directional Gaussian filter. | Ying-Rung Horng, Yu-Cheng Tseng, Tian-Sheuan Chang |
| 2010 | ISCAS | Low memory cost bilateral filtering using stripe-based sliding integral histogram. | Po-Hsiung Hsu, Yu-Cheng Tseng, Tian-Sheuan Chang |
| 2010 | ISCAS | A high throughput VLSI design with hybrid memory architecture for H.264/AVC CABAC decoder. | Yuan-Hsin Liao, Gwo-Long Li, Tian-Sheuan Chang |
| 2010 | PCS | Fast stereo matching with predictive search range. | Yu-Cheng Tseng, Po-Hsiung Hsu, Tian-Sheuan Chang |
| 2009 | ISCAS | Memory Analysis for H.264/AVC Scalable Extension Encoder. | Tzu-Yu Chen, Gwo-Long Li, Tian-Sheuan Chang |
| 2009 | ISCAS | A Memory Efficient Fine Grain Scalability Coefficient Encoding Method for H.264/AVC Scalable Video Extension. | Meng-Wei Shen, Gwo-Long Li, Tian-Sheuan Chang |
| 2009 | ISCAS | Low-memory Cost Belief Propagation Architecture for Disparity Estimation. | Yu-Cheng Tseng, Nelson Yen-Chung Chang, Tian-Sheuan Chang |
| 2008 | DAC | A 242mW, 10mm | Yu-Kun Lin, De-Wei Li, Chia-Chun Lin, Tzu-Yun Kuo, Sian-Jin Wu, Wei-Cheng Tai, Wei-Cheng Chang, Tian-Sheuan Chang |
| 2008 | ISCAS | ISID : In-order scan and indexed diffusion segmentation algorithm for stereo vision. | Jing-Chu Chan, Nelson Yen-Chung Chang, Tian-Sheuan Chang |
| 2008 | ISCAS | Data reuse analysis of local stereo matching. | Tsung-Hsien Tsai, Nelson Yen-Chung Chang, Tian-Sheuan Chang |
| 2007 | ICASSP | A Low Cost Context Adaptive Arithmetic Coder for H.264/MPEG-4 AVC Video Coding. | Jian-Long Chen, Yu-Kun Lin, Tian-Sheuan Chang |
| 2007 | ICASSP | SIFME: A Single Iteration Fractional-Pel Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding. | Tzu-Yun Kuo, Yu-Kun Lin, Tian-Sheuan Chang |
| 2007 | ICASSP | A 61MHz 72K Gates 1280x720 30FPS H.264 Intra Encoder. | De-Wei Li, Chun-Wei Ku, Chao-Chung Cheng, Yu-Kun Lin, Tian-Sheuan Chang |
| 2007 | ICASSP | PMRME: A Parallel Multi-Resolution Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding. | Chia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang |
| 2006 | ASPDAC | Algorithms and DSP implementation of H.264/AVC. | Hung-Chih Lin, Yu-Jen Wang, Kai-Ting Cheng, Shang-Yu Yeh, Wei-Nien Chen, Chia-Yang Tsai, Tian-Sheuan Chang, Hsueh-Ming Hang |
| 2006 | ISCAS | A 1280720 pixels 30 frames/s H.264/MPEG-4 AVC intra encoder. | Chao-Chung Cheng, Chun-Wei Ku, Tian-Sheuan Chang |
| 2006 | ISCAS | A fast fractional pel motion estimation algorithm for H.264/MPEG-4 AVC. | Yu-Jen Wang, Chao-Chung Cheng, Tian-Sheuan Chang |
| 2006 | ISCAS | A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264. | Guo-Shiuan Yu, Tian-Sheuan Chang |
| 2005 | ASPDAC | A bandwidth efficient subsampling-based block matching architecture for motion estimation. | Hao-Yun Chin, Chao-Chung Cheng, Yu-Kun Lin, Tian-Sheuan Chang |
| 2005 | ICIP | Fast block type decision algorithm for intra prediction in H.264 FRext. | Yu-Kun Lin, Tian-Sheuan Chang |
| 2005 | ISCAS | Combined frame memory architecture for motion compensation in video decoding. | Nelson Yen-Chung Chang, Tian-Sheuan Chang |
| 2005 | ISCAS | Fast three step intra prediction algorithm for 44 blocks in H.264. | Chao-Chung Cheng, Tian-Sheuan Chang |
| 1998 | ICASSP | Low power FIR filter realization with differential coefficients and input. | Tian-Sheuan Chang, Chein-Wei Jen |