| 2026 | ASPDAC | An Effective Placement Framework for Designs with Half-Row-Extended Cells. | Po-Yi Wu, Tzu-Sheng Hung, Wai-Kei Mak, Ting-Chi Wang |
| 2025 | DAC | GPart: A GNN-Enabled Multilevel Graph Partitioner. | Magi Chen, Ting-Chi Wang |
| 2025 | ICCAD | Leveraging GPU for Better Detailed Placement Quality. | Chen-Han Lu, Wen-Hao Liu, Haoxing Ren, Ting-Chi Wang |
| 2025 | ISCAS | Analyzing and Enhancing the Reliability of Vision Transformer Models Against Soft Errors. | En-Yu Liao, Ting-Chi Wang |
| 2024 | ASPDAC | A Fast and Robust Global Router with Capacity Reduction Techniques. | Yun-Kai Fang, Ye-Chih Lin, Ting-Chi Wang |
| 2024 | ASPDAC | An Effective Netlist Planning Approach for Double-sided Signal Routing. | Tzu-Chuan Lin, Fang-Yu Hsu, Wai-Kei Mak, Ting-Chi Wang |
| 2024 | DATE | A Hybrid Approach to Reverse Engineering on Combinational Circuits. | Wuqian Tang, Yi-Ting Li, Kai-Po Hsu, Kuan-Ling Chou, You-Cheng Lin, Chia-Feng Chien, Tzu-Li Hsu, Yung-Chih Chen, Ting-Chi Wang, Shih-Chieh Chang, TingTing Hwang, Chun-Yao Wang |
| 2024 | ICCAD | A Hypergraph Partitioner Utilizing a Novel Graph Generative Model. | Magi Chen, Ting-Chi Wang |
| 2024 | ICCAD | An Effective ECO Methodology for Reducing Back-side Design Rule Violations in Double-sided Signal Routing. | Che-Ping Tsai, Fang-Yu Hsu, Wai-Kei Mak, Ting-Chi Wang |
| 2023 | ISCAS | Fast and Accurate Detection of Audio Adversarial Examples. | Po-Hao Huang, Yung-Yuan Lan, Wilbert Harriman, Venesia Chiuwanara, Ting-Chi Wang |
| 2022 | ASPDAC | HybridGP: Global Placement for Hybrid-Row-Height Designs. | Kuan-Yu Chen, Hsiu-Chu Hsu, Wai-Kei Mak, Ting-Chi Wang |
| 2022 | ICCAD | Generation of Mixed-Driving Multi-Bit Flip-Flops for Power Optimization. | Meng-Yun Liu, Yu-Cheng Lai, Wai-Kei Mak, Ting-Chi Wang |
| 2020 | ASPDAC | Audio Adversarial Examples Generation with Recurrent Neural Networks | Kuei-Huan Chang, Po-Hao Huang, Honggang Yu, Yier Jin, Ting-Chi Wang |
| 2020 | DATE | MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. | Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang |
| 2020 | ICCAD | An Algorithm for Rule-based Layout Pattern Matching. | Sheng-Hao Wang, Yen-Jong Chen, Ting-Chi Wang, Oscar Chen |
| 2019 | DATE | A Mixed-Height Standard Cell Placement Flow for Digital Circuit Blocks | Yi-Cheng Zhao, Yu-Chieh Lin, Ting-Chi Wang, Ting-Hsiung Wang, Yun-Ru Wu, Hsin-Chang Lin, Shu-Yi Kao |
| 2018 | ICCAD | A practical detailed placement algorithm under multi-cell spacing constraints. | Yu-Hsiang Cheng, Ding-Wei Huang, Wai-Kei Mak, Ting-Chi Wang |
| 2017 | ASPDAC | Delay-driven layer assignment for advanced technology nodes. | Szu-Yuan Han, Wen-Hao Liu, Rickard Ewetz, Cheng-Kok Koh, Kai-Yuan Chao, Ting-Chi Wang |
| 2017 | DATE | On refining standard cell placement for self-aligned double patterning. | Ye-Hong Chen, Sheng-He Wang, Ting-Chi Wang |
| 2016 | ASPDAC | Negotiation-based track assignment considering local nets. | Man-Pan Wong, Wen-Hao Liu, Ting-Chi Wang |
| 2016 | ITC | Online slack-time binning for IO-registered die-to-die interconnects. | Chih-Chieh Zheng, Shi-Yu Huang, Shyue-Kung Lu, Ting-Chi Wang, Kun-Han Tsai, Wu-Tung Cheng |
| 2014 | ASPDAC | Redundant-via-aware ECO routing. | Hsi-An Chien, Ting-Chi Wang |
| 2014 | DAC | Floorplanning and Signal Assignment for Silicon Interposer-based 3D ICs. | Wen-Hao Liu, Min-Sheng Chang, Ting-Chi Wang |
| 2014 | DAC | Density-aware Detailed Placement with Instant Legalization. | Sergiy Popovych, Hung-Hao Lai, Chieh-Min Wang, Yih-Lang Li, Wen-Hao Liu, Ting-Chi Wang |
| 2014 | DATE | Mask-cost-aware ECO routing | Hsi-An Chien, Zhen-Yu Peng, Yun-Ru Wu, Ting-Hsiung Wang, Hsin-Chang Lin, Chi-Feng Wu, Ting-Chi Wang |
| 2014 | DATE | Metal layer planning for silicon interposers with consideration of routability and manufacturing cost. | Wen-Hao Liu, Tzu-Kai Chien, Ting-Chi Wang |
| 2014 | ICCAD | A resource-level parallel approach for global-routing-based routing congestion estimation and a method to quantify estimation accuracy. | Wen-Hao Liu, Zhen-Yu Peng, Ting-Chi Wang |
| 2013 | ASPDAC | An efficient hybrid synchronization technique for scalable multi-core instruction set simulations. | Bo-Han Zeng, Ren-Song Tsay, Ting-Chi Wang |
| 2011 | ASPDAC | Simultaneous redundant via insertion and line end extension for yield optimization. | Shing-Tung Lin, Kuang-Yao Lee, Ting-Chi Wang, Cheng-Kok Koh, Kai-Yuan Chao |
| 2010 | ICCAD | GLADE: A modern global router considering layer directives. | Yen-Jung Chang, Tsung-Hsien Lee, Ting-Chi Wang |
| 2010 | ICCAD | Simultaneous antenna avoidance and via optimization in layer assignment of multi-layer global routing. | Tsung-Hsien Lee, Ting-Chi Wang |
| 2009 | ICCAD | Pad assignment for die-stacking System-in-Package design. | Yu-Chen Lin, Wai-Kei Mak, Chris Chu, Ting-Chi Wang |
| 2008 | ASPDAC | A new global router for modern designs. | Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang |
| 2008 | ASPDAC | An MILP-based wire spreading algorithm for PSM-aware layout modification. | Ming-Chao Tsai, Yung-Chia Lin, Ting-Chi Wang |
| 2008 | DAC | A generalized network flow based algorithm for power-aware FPGA memory mapping. | Tien-Yuan Hsu, Ting-Chi Wang |
| 2008 | ICCAD | NTHU-Route 2.0: a fast and stable global router. | Yen-Jung Chang, Yu-Ting Lee, Ting-Chi Wang |
| 2007 | ASPDAC | Fast Buffered Delay Estimation Considering Process Variations. | Tien-Ting Fang, Ting-Chi Wang |
| 2007 | ASPDAC | Recent Research and Emerging Challenges in Physical Design for Manufacturability/Reliability. | Chung-Wei Lin, Ming-Chao Tsai, Kuang-Yao Lee, Tai-Chen Chen, Ting-Chi Wang, Yao-Wen Chang |
| 2007 | ASPDAC | A Fast and Stable Algorithm for Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction. | Pei-Ci Wu, Jhih-Rong Gao, Ting-Chi Wang |
| 2006 | ASPDAC | Post-routing redundant via insertion for yield/reliability improvement. | Kuang-Yao Lee, Ting-Chi Wang |
| 2006 | ICCAD | Post-routing redundant via insertion and line end extension with via density consideration. | Kuang-Yao Lee, Ting-Chi Wang, Kai-Yuan Chao |
| 2005 | ASPDAC | Concurrent flip-flop and buffer insertion with adaptive blockage avoidance. | Zhong-Ching Lu, Ting-Chi Wang |
| 2005 | ASPDAC | Maze routing with OPC consideration. | Yun-Ru Wu, Ming-Chao Tsai, Ting-Chi Wang |
| 2005 | ISCAS | Simple yet effective algorithms for block and I/O buffer placement in flip-chip design. | Hao-Yueh Hsieh, Ting-Chi Wang |
| 2003 | ASPDAC | Performance-driven multi-level clustering for combinational circuits. | Chin Ngai Sze, Ting-Chi Wang |
| 2002 | ISCAS | Module placement with pre-placed modules using the corner block list representation. | S. Dhamdhere, Ningyu Zhou, Ting-Chi Wang |
| 2002 | ISCAS | Optimal circuit clustering with variable interconnect delay. | Cliff C. N. Sze, Ting-Chi Wang |
| 2001 | ASPDAC | Module placement with boundary constraints using the sequence-pair representation. | Jianbang Lai, Ming-Shiun Lin, Ting-Chi Wang, Li-C. Wang |
| 2001 | ASPDAC | Power minization in LUT-based FPGA technology mapping. | Zhi-Hong Wang, En-Cheng Liu, Jianbang Lai, Ting-Chi Wang |
| 2001 | ISCAS | Module placement with pre-placed modules using the B*-tree representation. | Yi-He Jiang, Jianbang Lai, Ting-Chi Wang |
| 2000 | ASPDAC | Feasible two-way circuit partitioning with complex resource constraints. | Hsun-Cheng Lee, Ting-Chi Wang |
| 2000 | ISCAS | On accelerating slicing floorplan design with boundary constraints. | En-Cheng Liu, Tu-Hsing Lin, Ting-Chi Wang |
| 1999 | ASPDAC | Faster and Better Spectral Algorithms for Multi-Way Partitioning. | Jan-Yang Chang, Yu-Chen Liu, Ting-Chi Wang |
| 1993 | ICCAD | Routing for symmetric FPGAs and FPICs. | Yachyang Sun, Ting-Chi Wang, Chak-Kuen Wong, C. L. Liu |
| 1993 | ISCAS | A Graph Partitioning Problem for Multiple-chip Design. | Yao-Ping Chen, Ting-Chi Wang, D. F. Wong |
| 1992 | DAC | A Graph Theoretic Technique to Speed up Floorplan Area Optimization. | Ting-Chi Wang, D. F. Wong |
| 1990 | DAC | An Optimal Algorithm for Floorplan Area Optimization. | Ting-Chi Wang, D. F. Wong |