Ting-Ting Y. Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
4
Active years
1991–1996
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1996 | DAC | New Performance Driven Routing Techniques With Explicit Area/Delay Tradeoff and Simultaneous Wire Sizing. | John Lillis, Chung-Kuan Cheng, Ting-Ting Y. Lin, Chin-Yen Ho |
| 1996 | DAC | Area Efficient Pipelined Pseudo-Exhaustive Testing with Retiming. | Huoy-Yu Liou, Ting-Ting Y. Lin, Chung-Kuan Cheng |
| 1995 | ASPDAC | Performance driven multiple-source bus synthesis using buffer insertion. | Chia-Chun Tsai, De-Yu Kao, Chung-Kuan Cheng, Ting-Ting Y. Lin |
| 1995 | ICCAD | Optimal wire sizing and buffer insertion for low power and a generalized delay model. | John Lillis, Chung-Kuan Cheng, Ting-Ting Y. Lin |
| 1995 | ISLPED | Optimization of power dissipation and skew sensitivity in clock buffer synthesis. | Jae W. Chung, De-Yu Kao, Chung-Kuan Cheng, Ting-Ting Y. Lin |
| 1992 | ICCAD | A probabilistic multicommodity-flow solution to circuit clustering problems. | Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin |
| 1991 | DAC | A General Purpose Multiple Way Partitioning Algorithm. | Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin |