| 2026 | DATE | DAPO: Design Structure-Aware Pass Ordering for HLS via Contrastive and Reinforcement Learning. | Jinming Ge, Linfeng Du, Likith Anaparty, Shangkun Li, Tingyuan Liang, Afzal Ahmad, Vivek Chaturvedi, Sharad Sinha, Zhiyao Xie, Jiang Xu, Wei Zhang |
| 2024 | DAC | Explainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space Exploration. | Hanwei Fan, Ya Wang, Sicheng Li, Tingyuan Liang, Wei Zhang |
| 2024 | DATE | A Modular Branch Predictor Performance Analysis Framework for Fast Design Space Exploration. | Ya Wang, Hanwei Fan, Sicheng Li, Tingyuan Liang, Wei Zhang |
| 2024 | FPGA | GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network. | Chunyou Su, Linfeng Du, Tingyuan Liang, Zhe Lin, Maolin Wang, Sharad Sinha, Wei Zhang |
| 2023 | DAC | PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNN. | Jian Peng, Tingyuan Liang, Zhiyao Xie, Wei Zhang |
| 2023 | FPGA | FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs. | Linfeng Du, Tingyuan Liang, Sharad Sinha, Zhiyao Xie, Wei Zhang |
| 2023 | ICCAD | MiniTNtk: An Exact Synthesis-based Method for Minimizing Transistor Network. | Weihua Xiao, Shanshan Han, Yue Yang, Shaoze Yang, Cheng Zheng, Jingsong Chen, Tingyuan Liang, Lei Li, Weikang Qian |
| 2021 | ICCAD | AMF-Placer: High-Performance Analytical Mixed-size Placer for FPGA. | Tingyuan Liang, Gengjie Chen, Jieru Zhao, Sharad Sinha, Wei Zhang |
| 2020 | FPL | FP-Stereo: Hardware-Efficient Stereo Vision for Embedded Applications. | Jieru Zhao, Tingyuan Liang, Liang Feng, Wenchao Ding, Sharad Sinha, Wei Zhang, Shaojie Shen |
| 2019 | DAC | LAMA: Link-Aware Hybrid Management for Memory Accesses in Emerging CPU-FPGA Platforms. | Liang Feng, Jieru Zhao, Tingyuan Liang, Sharad Sinha, Wei Zhang |
| 2019 | DATE | Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis. | Jieru Zhao, Tingyuan Liang, Sharad Sinha, Wei Zhang |
| 2019 | FPGA | A Hybrid Data-Consistent Framework for Link-Aware AccessManagement in Emerging CPU-FPGA Platforms. | Liang Feng, Jieru Zhao, Tingyuan Liang, Sharad Sinha, Wei Zhang |
| 2019 | ICCAD | Hi-ClockFlow: Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis. | Tingyuan Liang, Jieru Zhao, Liang Feng, Sharad Sinha, Wei Zhang |
| 2017 | FPL | PAAS: A system level simulator for heterogeneous computing architectures. | Tingyuan Liang, Liang Feng, Sharad Sinha, Wei Zhang |