Tomasz S. Czajkowski
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
18
Venues
9
Active years
2004–2024
Best venue rank
A*
Where they publish
Papers
18 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | CASES | Work-in-Progress:ACPO: An AI-Enabled Compiler Framework. | Amir H. Ashouri, Muhammad Asif Manzoor, Minh Vu, Raymond Zhang, Ziwen Wang, Angel Zhang, Bryan Chan, Tomasz S. Czajkowski, Yaoqing Gao |
| 2024 | ICPP | RoDMap: A Reserve-on-Demand Mapper for Spatially-Configured Coarse-Grained Reconfigurable Arrays. | Kyle Zhao Bin Chen, Tarek S. Abdelrahman, Reza Azimi, Tomasz S. Czajkowski, Maziar Goudarzi |
| 2018 | DATE | High-level synthesis of software-customizable floating-point cores. | Samridhi Bansal, Hsuan Hsiao, Tomasz S. Czajkowski, Jason Helge Anderson |
| 2018 | ICCVG | Modeling and Rendering of Volumetric Clouds in Real-Time with Unreal Engine 4. | Lukasz Nowak, Artur Bak, Tomasz S. Czajkowski, Konrad Wojciechowski |
| 2018 | ICCVG | Real-Time Simulation of Animated Characters Crowd in Unreal Engine 4. | Michal Rosenbeiger, Artur Bak, Tomasz S. Czajkowski |
| 2015 | FPGA | Silicon Verification using High-Level Design Tools (Abstract Only). | Tomasz S. Czajkowski |
| 2015 | FPGA | High-Level Design Tools for Floating Point FPGAs. | Deshanand P. Singh, Bogdan Pasca, Tomasz S. Czajkowski |
| 2014 | EUC | Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis. | Blair Fort, Andrew Canis, Jongsok Choi, Nazanin Calagar, Ruolong Lian, Stefan Hadjis, Yu Ting Chen, Mathew Hall, Bain Syrowik, Tomasz S. Czajkowski, Stephen Brown, Jason Helge Anderson |
| 2013 | CASES | From software to accelerators with LegUp high-level synthesis. | Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Brown, Jason Helge Anderson |
| 2013 | FPGA | Harnessing the power of FPGAs using altera's OpenCL compiler. | Deshanand P. Singh, Tomasz S. Czajkowski, Andrew C. Ling |
| 2012 | FCCM | Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems. | Jongsok Choi, Kevin Nam, Andrew Canis, Jason Helge Anderson, Stephen Brown, Tomasz S. Czajkowski |
| 2012 | FPGA | Impact of FPGA architecture on resource sharing in high-level synthesis. | Stefan Hadjis, Andrew Canis, Jason Helge Anderson, Jongsok Choi, Kevin Nam, Stephen Brown, Tomasz S. Czajkowski |
| 2012 | FPL | From opencl to high-performance hardware on FPGAS. | Tomasz S. Czajkowski, Utku Aydonat, Dmitry Denisenko, John Freeman, Michael Kinsner, David Neto, Jason Wong, Peter Yiannacouras, Deshanand P. Singh |
| 2011 | FPGA | LegUp: high-level synthesis for FPGA-based processor/accelerator systems. | Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Jason Helge Anderson, Stephen Brown, Tomasz S. Czajkowski |
| 2008 | DAC | Functionally linear decomposition and synthesis of logic circuits for FPGAs. | Tomasz S. Czajkowski, Stephen Dean Brown |
| 2008 | FPL | Fast toggle rate computation for FPGA circuits. | Tomasz S. Czajkowski, Stephen Dean Brown |
| 2007 | DAC | Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits. | Tomasz S. Czajkowski, Stephen Dean Brown |
| 2004 | FPGA | A synthesis oriented omniscient manual editor. | Tomasz S. Czajkowski, Jonathan Rose |