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Toru Koizumi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

12

Venues

8

Active years

2018–2026

Best venue rank

A*

Where they publish

Papers

12 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCARUNLTS: Branch Prediction with Register-Value Correlations and Hierarchical Table Orchestration.Toru Koizumi, Toshiki Maekawa, Masanari Mizuno, Maru Kuroki, Tomoaki Tsumura, Ryota Shioya
2025ARITHTrailing-Ones Anticipation for Reducing the Latency of the Rounding Incrementer in FP FMA Units.Toru Koizumi, Ryota Shioya, Takuya Yamauchi, Tomoya Adachi, Ken Namura, Jun Makino
2025ICCDRegister Bridging: A Lightweight Microarchitectural Approach for Skipping Overhead Instructions in Distance-Based ISA Processors.Fan Yang, Toru Koizumi, Jun Li, Shu Sugita, Yuriko Yamauchi, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie
2023CCA Sound and Complete Algorithm for Code Generation in Distance-Based ISA.Shu Sugita, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
2023DATETURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA.Reoma Matsuo, Toru Koizumi, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya
2023ISCASAn Out-of-Order Superscalar Processor Using STRAIGHT Architecture in 28 nm CMOS.Taichi Amano, Junichiro Kadomoto, Satoshi Mitsuno, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
2023MICROClockhands: Rename-free Instruction Set Architecture for Out-of-order Processors.Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
2022DATET-SKID: Predicting When to Prefetch Separately from Address Prediction.Toru Koizumi, Tomoki Nakamura, Yuya Degawa, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya
2021ICCDCompiling and Optimizing Real-world Programs for STRAIGHT ISA.Toru Koizumi, Shu Sugita, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
2021ICCDAccurate and Fast Performance Modeling of Processors with Decoupled Front-end.Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai
2020FPLA High-Performance Out-of-Order Soft Processor Without Register Renaming.Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai
2018MICROSTRAIGHT: Hazardless Processor Architecture Without Register Renaming.Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai