Trevor Bauer
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2015–2019
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | FPGA | Xilinx Adaptive Compute Acceleration Platform: Versal | Brian Gaide, Dinesh Gaitonde, Chirag Ravishankar, Trevor Bauer |
| 2018 | FPL | Placement Strategies for 2.5D FPGA Fabric Architectures. | Chirag Ravishankar, Dinesh Gaitonde, Trevor Bauer |
| 2015 | FPGA | Enhancements in UltraScale CLB Architecture. | Shant Chandrakar, Dinesh Gaitonde, Trevor Bauer |